SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 388

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

23.8.4
23.8.4.1
Figure 23-11. WRITE_MODE = 1. The write operation is controlled by NWE
23.8.4.2
Figure 23-12. WRITE_MODE = 0. The write operation is controlled by NCS
388
388
SAM3S8/SD8
SAM3S8/SD8
Write Mode
Write is Controlled by NWE (WRITE_MODE = 1):
Write is Controlled by NCS (WRITE_MODE = 0)
A [23:0]
A [23:0]
D[7:0]
D[7:0]
NWE
NWE
MCK
MCK
NCS
NCS
The WRITE_MODE parameter in the SMC_MODE register of the corresponding chip select indi-
cates which signal controls the write operation.
Figure 23-11
put on the bus during the pulse and hold steps of the NWE signal. The internal data buffers are
switched to output mode after the NWE_SETUP time, and until the end of the write cycle,
regardless of the programmed waveform on NCS.
Figure 23-12
put on the bus during the pulse and hold steps of the NCS signal. The internal data buffers are
switched to output mode after the NCS_WR_SETUP time, and until the end of the write cycle,
regardless of the programmed waveform on NWE.
shows the waveforms of a write operation with WRITE_MODE set to 1. The data is
shows the waveforms of a write operation with WRITE_MODE set to 0. The data is
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12