SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 611

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

29.8.7
29.8.7.1
29.8.7.2
29.8.8
29.8.9
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Using the Peripheral DMA Controller (PDC)
SMBUS Quick Command (Master Mode Only)
Read-write Flowcharts
Data Transmit with the PDC
Data Receive with the PDC
The use of the PDC significantly reduces the CPU load.
To assure correct implementation, respect the following programming sequences:
The TWI interface can perform a Quick Command:
Figure 29-14. SMBUS Quick Command
The following flowcharts shown in
29-18 on page
read and write operations. A polling or interrupt method can be used to check the status bits.
The interrupt method requires that the interrupt enable register (TWI_IER) be configured first.
1. Initialize the transmit PDC (memory pointers, transfer size).
2. Configure the master mode.
3. Start the transfer by setting the PDC TXTEN bit.
4. Wait for the PDC ENDTX Flag either by using the polling method or ENDTX interrupt.
5. Disable the PDC by setting the PDC TXDIS bit.
1. Initialize the receive PDC (memory pointers, transfer size - 1).
2. Configure the master mode (DADR, CKDIV, etc.).
3. Start the transfer by setting the PDC RXTEN bit.
4. Wait for the PDC ENDRX Flag either by using polling method or ENDRX interrupt.
5. Disable the PDC by setting the PDC RXDIS bit.
1. Configure the master mode (DADR, CKDIV, etc.).
2. Write the MREAD bit in the TWI_MMR register at the value of the one-bit command to
3. Start the transfer by setting the QUICK bit in the TWI_CR.
be sent.
615,
Figure 29-19 on page 616
TXCOMP
Write QUICK command in TWI_CR
TXRDY
TWD
Figure 29-16 on page
S
DADR
and
Figure 29-20 on page 617
R/W
613,
A
Figure 29-17 on page
P
SAM3S8/SD8
SAM3S8/SD8
give examples for
614,
Figure
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