ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 9

• Manufacturer Part Number: ATxmega128A1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 78
• Ext Interrupts: 78
• Usb Speed: No
• Usb Interface: No
• Spi: 12
• Twi (i2c): 4
• Uart: 8
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 8
• Output Compare Channels: 24
• Input Capture Channels: 24
• Pwm Channels: 24
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

3.7
3.8
3.9
8077H–AVR–12/09
Status Register
Stack and Stack Pointer
Register File
The Status Register (SREG) contains information about the result of the most recently executed
arithmetic or logic instruction. This information can be used for altering program flow in order to
perform conditional operations. Note that the Status Register is updated after all ALU opera-
tions, as specified in the instruction set reference. This will in many cases remove the need for
using the dedicated compare instructions, resulting in faster and more compact code.
The Status Register is not automatically stored when entering an interrupt routine nor restored
when returning from an interrupt. This must be handled by software.
The Status Register is accessible in the I/O Memory space.
The Stack is used for storing return addresses after interrupts and subroutine calls. It can also
be used for storing temporary data. The Stack Pointer (SP) register always points to the top of
the Stack. It is implemented as two 8-bit registers that is accessible in the I/O Memory space.
Data is pushed and popped from the Stack using the PUSH and POP instructions. The Stack is
implemented as growing from higher memory locations to lower memory locations. This implies
that a pushing data on the Stack decreases the SP, and popping data off the Stack increases
the SP.The SP is automatically loaded after reset, and the initial value is the highest address of
the internal SRAM. If the SP is changed, it must be set to point above address 0x2000 and it
must be defined before any subroutine calls are executed or before interrupts are enabled.
During interrupts or subroutine calls the return address is automatically pushed on the Stack.
The return address can be two or three bytes, depending of the memory size of the device. For
devices with 128K bytes or less of program memory the return address is two bytes, hence the
Stack Pointer is decremented/incremented by two. For devices with more than 128K bytes of
program memory, the return address is three bytes, hence the SP is decremented/incremented
by three. The return address is popped of the Stack when returning from interrupts using the
RETI instruction, and subroutine calls using the RET instruction.
The SP is decremented by one when data is pushed onto the Stack with the PUSH instruction,
and incremented by one when data is popped off the Stack using the POP instruction.
To prevent corruption when updating the Stack Pointer from software, a write to SPL will auto-
matically disable interrupts for up to 4 instructions or until the next I/O memory write.
The Register File consists of 32 x 8-bit general purpose registers. In order to achieve the
required performance and flexibility, the Register File supports the following input/output
schemes:
• One 8-bit output operand and one 8-bit result input
• Two 8-bit output operands and one 8-bit result input
• Two 8-bit output operands and one 16-bit result input
• One 16-bit output operand and one 16-bit result input
XMEGA A
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