ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 194

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ATxmega128A1

Manufacturer Part Number
ATxmega128A1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128A1

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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17.3.7
17.3.8
17.3.9
8077H–AVR–12/09
CNTL - Real Time Counter Register L
PERH - Real Time Counter Period Register High
PERL - Real Time Counter Period Register L
• Bits 7:0 - CNT[15:8]: Real Time Counter value High byte
These bits hold the 8 MSB of the 16-bit Real Time Counter value.
• Bits 7:0 - CNT[7:0]: Real Time Counter value Low byte
These bits hold the 8 LSB of the 16-bit Real Time Counter value.
The PERH and PERL register pair represents the 16-bit value PER. PER is constantly com-
pared with the counter value (CNT). A match will set the OVFIF in the INTFLAGS register and
clear CNT. Reading and writing 16-bit values require special attention, refer to
bits Registers” on page 12
Due to synchronization between RTC clock and the system clock domains, there is a latency of
two RTC clock cycles from updating the register until this has an effect. Application software
needs to check that the SYNCBUSY flag in the
on page 192
• Bits 7:0 - PER[15:8]: Real Time Counter Period High byte
These bits hold the 8 MSB of the 16-bit RTC top value.
• Bits 7:0 - PER[7:0]: Real Time Counter Period Low byte
These bits hold the 8 LSB of the 16-bit RTC top value.
Bit
+0x0B
Read/Write
Initial Value
Bit
+0x08
Read/Write
Initial Value
Bit
+0x0A
Read/Write
Initial Value
is cleared before writing to this register.
R/W
R/W
R/W
7
1
7
0
7
1
R/W
R/W
R/W
6
1
6
0
6
1
for details.
R/W
R/W
R/W
5
0
5
1
5
1
R/W
R/W
R/W
4
0
4
1
4
1
PER[15:8]
CNT[7:0]
PER[7:0]
”STATUS - Real Time Counter Status Register”
R/W
R/W
R/W
3
0
3
1
3
1
R/W
R/W
R/W
2
0
2
1
2
1
R/W
R/W
R/W
1
0
1
1
1
1
XMEGA A
R/W
R/W
R/W
”Accessing 16-
0
0
0
1
0
1
CNTL
PERH
PERL
194

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