ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 443

• Manufacturer Part Number: ATxmega128A1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 78
• Ext Interrupts: 78
• Usb Speed: No
• Usb Interface: No
• Spi: 12
• Twi (i2c): 4
• Uart: 8
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 8
• Output Compare Channels: 24
• Input Capture Channels: 24
• Pwm Channels: 24
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8077H–AVR–12/09
28 IEEE 1149.1 JTAG Boundary Scan interface ..................................... 337
29 Program and Debug Interface ............................................................. 344
30 Memory Programming ......................................................................... 362
31 Peripheral Module Address Map ........................................................ 386
32 Instruction Set Summary .................................................................... 388
27.11
28.1
28.2
28.3
28.4
28.5
28.6
29.1
29.2
29.3
29.4
29.5
29.6
29.7
29.8
30.1
30.2
30.3
30.4
30.5
30.6
30.7
30.8
30.9
30.10
30.11
30.12
30.13
30.14
Interrupt vector Summary ..............................................................................336
Features ........................................................................................................337
Overview ........................................................................................................337
TAP - Test Access Port .................................................................................338
JTAG instructions ..........................................................................................339
Data registers ................................................................................................341
Boundary-scan chain .....................................................................................342
Features ........................................................................................................344
Overview ........................................................................................................344
PDI Physical ..................................................................................................345
JTAG Physical ...............................................................................................350
PDI Controller ................................................................................................353
Register Description - PDI Instruction and Addressing Registers .................357
Register Description - PDI Control and Status Register ................................359
Register Summary .........................................................................................361
Features ........................................................................................................362
Overview ........................................................................................................362
NVM Controller ..............................................................................................363
NVM Commands ...........................................................................................363
NVM Controller Busy .....................................................................................363
Flash and EEPROM Page Buffers ................................................................364
Flash and EEPROM Programming Sequences .............................................365
Protection of NVM .........................................................................................366
Preventing NVM Corruption ...........................................................................366
CRC Functionality ..........................................................................................366
Self-Programming and Boot Loader Support ................................................367
External Programming ...................................................................................379
Register Description ......................................................................................385
Register Summary .........................................................................................385
XMEGA A
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