ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 423

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ATxmega128A1

Manufacturer Part Number
ATxmega128A1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128A1

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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8077H–AVR–12/09
* The number of NOPs is equal to ROWCOLDLY[2:0] (ROWCOLDLY = 1 is shown)
** NOP is only inserted for CAS3
*** Clock suspended for 1 cycle when EBI is running at 1x and 1 or 2 cycles when EBI
is running at 2x, to enable sampling of data on the positive edge of the 1x clock.
**** The number of NOPs is equal to WRDLY[1:0] + 1 (WRDLY = 0 is shown)
***** The number of NOPs is equal to RPDLY[1:0] (RPDLY = 1 is shown)
Clk
CS
CLK
CKE
WE
CAS
RAS
DQM
BA[1:0]
A[11:0]
D
PER2
Two consecutive reads
Row Adr
Figure 33-49. Two consecutive reads
Bank Adr
Col Adr
D[3:0]
D[7:4]
0x400
0x0
Row Adr
Bank Adr
Col Adr
D[3:0]
D[7:4]
XMEGA A
0x400
0x0
423

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