ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 429

• Manufacturer Part Number: ATxmega128A1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 78
• Ext Interrupts: 78
• Usb Speed: No
• Usb Interface: No
• Spi: 12
• Twi (i2c): 4
• Uart: 8
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 8
• Output Compare Channels: 24
• Input Capture Channels: 24
• Pwm Channels: 24
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

34. Datasheet Revision History
34.1
34.2
8077H–AVR–12/09
8077H – 12/09
8077G – 04/09
Please note that the referring page numbers in this section are referring to this document. The
referring revision in this section are referring to the document revision.
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Removed Spike detector from XMEGA A Manual
Removed Table 4-9 on page 34.
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Updated the description of
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Changed in all datasheet Res: Reserved to Reserved.
Updated IRCOM registers in
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”TC - 16-bit Timer/Counter” on page 149
”CTRLB - Non-Volatile Memory Control Register B” on page
”System Clock and Clock options” on page
”Internal Oscillators” on page
Figure 7-5 on page
”Reset System” on page
Table 9-2 on page
”I/O Pin Configuration” on page
”Register Summary – Port Configuration” on page
”STATUS - Real Time Counter Status Register” on page
”Register Description - TWI Master” on page 217
”ADC - Analog to Digital Converter” on page
”Program and Debug Interface” on page
”Register Description – Fuses and Lockbits” on page
”Interrupt Vector Summary - NVM Controller” on page
”COMP2 - Oscillator Compare Register 2” on page
”Interrupt Vector Summary” on page
”EBI Timing” on page 277
Figure 25-10 on page
”Appendix A: EBI Timing Diagrams” on page
”ADDR - TWI Slave Address Register” on page
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”Register Description” on page 249
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from section 26 to section 14.
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XMEGA A
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