ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 385

• Manufacturer Part Number: ATxmega128A1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 78
• Ext Interrupts: 78
• Usb Speed: No
• Usb Interface: No
• Spi: 12
• Twi (i2c): 4
• Uart: 8
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 8
• Output Compare Channels: 24
• Input Capture Channels: 24
• Pwm Channels: 24
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

30.12.3.11
30.13 Register Description
30.14 Register Summary
8077H–AVR–12/09
Write Fuse/ Lock Bit
Once this operation starts the PDIBUS between the PDI Controller and the NVM is disabled, and
the NVMEN bit in the PDI STATUS register is cleared until the operation is finished. Poll the
NVMEN bit until this is set again, indicting the PDIBUS is enabled.
The BUSY flag in the NVM STATUS register will be set until the operation is finished. The CRC
checksum will be available in the NVM DATA register.
The Write Fuse and Write Lock Bit command is used to write the fuses and the lock bits to a
more secure setting.
The BUSY flag in the NVM STATUS register will be set until the command is finished.
For lock bit write the LOCK BIT write command can also be used.
Refer to
the NVM Controller.
Refer to
ister description on the PDI.
Refer to
NVM Controller.
Refer to
1. Load the NVM CMD register with Flash CRC command.
2. Set the CMDEX bit in the NVM CTRLA register. This requires the timed CCP sequence
1. Load the NVM CMD register with the Write Fuse/ Lock Bit command.
2. Write the selected fuse or Lock Bits by doing a PDI Write operation.
during self-programming.
”Register Description - PDI Control and Status Register” on page 359
”Register Summary - NVM Controller” on page 46
”Register Summary” on page 361
”Register Summary - NVM Controller” on page 46
for complete register summary on the PDI.
for complete register summary on the
for complete register description on
XMEGA A
for complete reg-
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