ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 133

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ATxmega128A1

Manufacturer Part Number
ATxmega128A1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128A1

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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13.4.4
13.5
8077H–AVR–12/09
Reading the Pin value
Wired-AND
Figure 13-6. Output configuration - Wired-OR with optional pull-down.
With Wired-AND configuration, the pin will be driven low when the corresponding bit in OUT is
written to zero. When OUT is set to one, the pin is released allowing the pin to be pulled low with
the internal or an external pull-resistor. If internal pull-up is used, this is also active if the pin is
set as input.
Figure 13-7. Output configuration - Wired-AND with optional pull-up.
Independent of the pin data direction, the pin value can be read from the IN register as shown in
Figure 13-1 on page
register bit and the preceding flip-flop constitute a synchronizer. The synchronizer is needed to
avoid metastability if the physical pin changes value near the edge of the internal clock. The
Synchronizer introduces a delay on the internal signal line.
timing diagram of the synchronization when reading an externally applied pin value. The maxi-
mum and minimum propagation delays are denoted t
130. If the digital input is disabled, the pin value cannot be read. The IN
OUTn
OUTn
INn
INn
pd,max
and t
Figure 13-8 on page 134
pd,min
respectively.
Pn
Pn
XMEGA A
shows a
133

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