ATtiny40 Atmel Corporation, ATtiny40 Datasheet - Page 60

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ATtiny40

Manufacturer Part Number
ATtiny40
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny40

Flash (kbytes)
4 Kbytes
Pin Count
20
Max. Operating Frequency
12 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
Yes
Max I/o Pins
18
Ext Interrupts
18
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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ATtiny40
• Port C, Bit 2 – INT0/CLKO/MISO/PCINT14
• Port C, Bit 3 – RESET/PCINT15
• Port C, Bit 4 – MOSI/SDA/TPIDATA/PCINT16
• Port C, Bit 5 – CLKI/PCINT17
• INT0: The PC2 pin can serve as an External Interrupt source 0.
• CLKO: The divided system clock can be output on the PB5 pin, if the CKOUT Fuse is
• MISO: SPI Master Input / Slave Output. Regardless of DDC2, this pin is automatically
• PCINT14: Pin Change Interrupt source 14. The PC2 pin can serve as an external interrupt
• RESET: External Reset input is active low and enabled by unprogramming (“1”) the
• PCINT15: Pin Change Interrupt source 15. The PC3 pin can serve as an external interrupt
• MOSI: SPI Master Output / Slave Input. Regardless of DDC4, this pin is automatically
• SDA: TWI Data. The pin is disconnected from the port and becomes the serial data for the
• TPIDATA: Serial Programming Data.
• PCINT16: Pin Change Interrupt source 16. The PC4 pin can serve as an external interrupt
• CLKI: Clock Input from an external clock source, see
• TPICLK: Serial Programming Clock.
• PCINT17: Pin Change Interrupt source 17. The PC5 pin can serve as an external interrupt
programmed, regardless of the PORTB5 and DDB5 settings. It will also be output during
reset.
configured as an input when SPI is enabled as a master. The data direction of this pin is
controlled by DDC2 when SPI is enabled as a slave.
source for pin change interrupt 2.
RSTDISBL Fuse. Pullup is activated and output driver and digital input are deactivated when
the pin is used as the RESET pin.
source for pin change interrupt 2.
configured as an input when SPI is enabled as a slave. The data direction of this pin is
controlled by DDC4 when SPI is enabled as a master.
TWI when TWEN in TWSCRA is set. In this mode of operation, the pin is driven by an open
drain driver with slew rate limitation and a spike filter.
source for pin change interrupt 2.
source for pin change interrupt 2.
“External Clock” on page
8263A–AVR–08/10
21.

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