ATtiny40 Atmel Corporation, ATtiny40 Datasheet - Page 36

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ATtiny40

Manufacturer Part Number
ATtiny40
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny40

Flash (kbytes)
4 Kbytes
Pin Count
20
Max. Operating Frequency
12 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
Yes
Max I/o Pins
18
Ext Interrupts
18
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATtiny40-MMHR
Quantity:
6 000
8.4.1
8.4.1.1
8.4.1.2
36
ATtiny40
Procedure for Changing the Watchdog Timer Configuration
Safety Level 1
Safety Level 2
Figure 8-7.
The Wathdog Timer can also be configured to generate an interrupt instead of a reset. This can
be very helpful when using the Watchdog to wake-up from Power-down.
To prevent unintentional disabling of the Watchdog or unintentional change of time-out period,
two different safety levels are selected by the fuse WDTON as shown in
See
Table 8-1.
The sequence for changing configuration differs between the two safety levels, as follows:
In this mode, the Watchdog Timer is initially disabled, but can be enabled by writing the WDE bit
to one without any restriction. A special sequence is needed when disabling an enabled Watch-
dog Timer. To disable an enabled Watchdog Timer, the following procedure must be followed:
In this mode, the Watchdog Timer is always enabled, and the WDE bit will always read as one. A
protected change is needed when changing the Watchdog Time-out period. To change the
Watchdog Time-out, the following procedure must be followed:
WDTON
Unprogrammed
Programmed
1. Write the signature for change enable of protected I/O registers to register CCP
2. Within four instruction cycles, in the same operation, write WDE and WDP bits
1. Write the signature for change enable of protected I/O registers to register CCP
2. Within four instruction cycles, write the WDP bit. The value written to WDE is irrelevant
“Procedure for Changing the Watchdog Timer Configuration” on page 36
Watchdog Timer
WDT Configuration as a Function of the Fuse Settings of WDTON
Safety
Level
1
2
WATCHDOG
OSCILLATOR
RESET
128 kHz
WDP0
WDP1
WDP2
WDP3
WDE
WDT
Initial State
Disabled
Enabled
How to
Disable the WDT
Protected change
sequence
Always enabled
MCU RESET
PRESCALER
WATCHDOG
MUX
How to
Change Time-out
No limitations
Protected change
sequence
Table 8-1 on page
for details.
8263A–AVR–08/10
36.

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