ATtiny40 Atmel Corporation, ATtiny40 Datasheet - Page 38

• Manufacturer Part Number: ATtiny40
• Manufacturer: Atmel Corporation

Specifications of ATtiny40

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 18
• Ext Interrupts: 18
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

38
ATtiny40
Watchdog System Reset mode. If the interrupt is not executed before the next time-out, a Sys-
tem Reset will be applied.
Table 8-2.
Note:
• Bit 4 – Res: Reserved Bit
This bit is reserved and will always read as zero.
• Bit 3 – WDE: Watchdog System Reset Enable
WDE is overridden by WDRF in RSTFLR. This means that WDE is always set when WDRF is
set. To clear WDE, WDRF must be cleared first. This feature ensures multiple resets during con-
ditions causing failure, and a safe start-up after the failure.
• Bits 5, 2:0 – WDP[3:0]: Watchdog Timer Prescaler 3, 2, 1 and 0
The WDP[3:0] bits determine the Watchdog Timer prescaling when the Watchdog Timer is run-
ning. The different prescaling values and their corresponding time-out periods are shown in
Table 8-3 on page
Table 8-3.
WDTON
WDP3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
1. WDTON configuration bit set to “0“ means programmed and “1“ means unprogrammed.
(1)
WDP2
0
0
0
0
1
1
1
1
0
0
WDE
Watchdog Timer Configuration
Watchdog Timer Prescale Select
0
0
1
1
x
38.
WDP1
WDIE
0
0
1
1
0
0
1
1
0
0
0
1
0
1
x
WDP0
Mode
Stopped
Interrupt
System Reset
Interrupt and System Reset
System Reset
0
1
0
1
0
1
0
1
0
1
1024K (1048576) cycles
WDT Oscillator Cycles
128K (131072) cycles
256K (262144) cycles
512K (524288) cycles
16K (16384) cycles
32K (32768) cycles
64K (65536) cycles
2K (2048) cycles
4K (4096) cycles
8K (8192) cycles
Number of
Action on Time-out
None
Interrupt
Reset
Interrupt, then go to System Reset Mode
Reset
Typical Time-out
at V
0.125 s
16 ms
32 ms
64 ms
0.25 s
CC
0.5 s
1.0 s
2.0 s
4.0 s
8.0 s
8263A–AVR–08/10
= 5.0V