ATtiny40 Atmel Corporation, ATtiny40 Datasheet - Page 35

• Manufacturer Part Number: ATtiny40
• Manufacturer: Atmel Corporation

Specifications of ATtiny40

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 18
• Ext Interrupts: 18
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

8.3
8.3.1
8.4
8263A–AVR–08/10
Internal Voltage Reference
Watchdog Timer
Voltage Reference Enable Signals and Start-up Time
Figure 8-6.
ATtiny40 features an internal bandgap reference. This reference is used for Brown-out Detec-
tion, and it can be used as an input to the Analog Comparator or the ADC. The bandgap voltage
varies with supply voltage and temperature.
The voltage reference has a start-up time that may influence the way it should be used. The
start-up time is given in
reference is not always turned on. The reference is on during the following situations:
Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user
must always allow the reference to start up before the output from the Analog Comparator or
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering Power-down mode.
The Watchdog Timer is clocked from an on-chip oscillator, which runs at 128 kHz. See
7. By controlling the Watchdog Timer prescaler, the Watchdog Reset interval can be adjusted as
shown in
Timer. The Watchdog Timer is also reset when it is disabled and when a device reset occurs.
Ten different clock cycle periods can be selected to determine the reset period. If the reset
period expires without another Watchdog Reset, the ATtiny40 resets and executes from the
Reset Vector. For timing details on the Watchdog Reset, refer to
1. When the BOD is enabled (by programming the BODLEVEL[2:0] Fuse).
2. When the internal reference is connected to the Analog Comparator (by setting the
3. When the ADC is enabled.
INTERNAL
TIME-OUT
ACBG bit in ACSR).
RESET
RESET
Table 8-2 on page
V
CC
Brown-out Reset During Operation
“System and Reset Characteristics” on page
38. The WDR – Watchdog Reset – instruction resets the Watchdog
V
BOT-
Table 8-3 on page
V
t
TOUT
BOT+
168. To save power, the
38.
Figure 8-
35