AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 803

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AT32UC3C2256C

Manufacturer Part Number
AT32UC3C2256C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C2256C

Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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30.3
30.4
30.5
30.5.1
30.5.2
32117C–AVR-08/11
Block Diagram
I/O Lines Description
Product Dependencies
I/O lines
Power Management
Figure 30-1. IISC Block Diagram
Table 30-1.
In order to use this module, other parts of the system must be configured correctly, as described
below.
The IISC pins may be multiplexed with I/O Controller lines. The user must first program the I/O
Controller to assign the desired IISC pins to their peripheral function. If the IISC I/O lines are not
used by the application, they can be used for other purposes by the I/O Controller. It is required
to enable only the IISC inputs and outputs actually in use.
If the CPU enters a sleep mode that disables clocks used by the IISC, the IISC will stop function-
ing and resume operation after the system wakes up from sleep mode.
Bus Bridge
Peripheral
Peripheral
Controller
Controller
Manager
Interrupt
Pin Name
Power
SCIF
DMA
IMCK
ISDO
ISCK
IWS
ISDI
I/O Lines Description
PB clock
Master Clock
Serial Clock
I
Serial Data Input
Serial Data Output
2
IRQ
PB
Rx
S Word Select or TDM Frame Sync
Tx
Generic clock
Pin Description
Transmitter
Receiver
Clocks
IISC
AT32UC3C
Input/Output
Input/Output
IMCK
ISCK
IWS
ISDI
ISDO
Output
Output
Type
Input
803

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