AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 625

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AT32UC3C2256C

Manufacturer Part Number
AT32UC3C2256C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C2256C

Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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25.7.1
Name:
Access Type:
Offset:
Reset Value:
32117C–AVR-08/11
LINWKUP: Send LIN Wakeup Signal
LINABT: Abort LIN Transmission
RTSDIS/RCS: Request to Send Disable/Release SPI Chip Select
RTSEN/FCS: Request to Send Enable/Force SPI Chip Select
DTRDIS: Data Terminal Ready Disable
DTREN: Data Terminal Ready Enable
RETTO: Rearm Time-out
RETTO
TXDIS
31
23
15
7
0: No effect:
1: Sends a wakeup signal on the LIN bus.
0: No effect.
1: Abort the current LIN transmission.
If USART does not operate in SPI Master Mode (MODE … 0xE):
0: No effect.
1: Drives the pin RTS to 1.
If USART operates in SPI Master Mode (MODE = 0xE):
RCS = 0: No effect.
RCS = 1: Releases the Slave Select Line NSS (RTS pin).
If USART does not operate in SPI Master Mode (MODE … 0xE):
0: No effect.
1: Drives the pin RTS to 0.
If USART operates in SPI Master Mode (MODE = 0xE):
FCS = 0: No effect.
FCS = 1: Forces the Slave Select Line NSS (RTS pin) to 0, even if USART is no transmitting, in order to address SPI slave
devices supporting the CSAAT Mode (Chip Select Active After Transfer).
0: No effect.
1: Drives the pin DTR to 1.
0: No effect.
1: Drives the pin DTR at 0.
0: No effect
1: Restart Time-out
Control Register
RSTNACK
TXEN
30
22
14
CR
Write-only
0x0
-
6
LINWKUP
RXDIS
RSTIT
29
21
13
5
LINABT
SENDA
RXEN
28
20
12
4
RTSDIS/RCS
STTTO
RSTTX
27
19
11
3
RTSEN/FCS
STPBRK
RSTRX
26
18
10
2
STTBRK
DTRDIS
25
17
9
1
AT32UC3C
RSTSTA
DTREN
24
16
8
0
625

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