AGXD533AAXF0CC AMD (ADVANCED MICRO DEVICES), AGXD533AAXF0CC Datasheet - Page 78

• Manufacturer Part Number: AGXD533AAXF0CC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AGXD533AAXF0CC

• Device Core: X86
• Device Core Size: 64b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.58V
• Operating Supply Voltage (min): 1.42V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 368
• Package Type: BGD
• Lead Free Status / Rohs Status: Not Compliant

4.2.2.15 Descriptor Statistic Action (STATISTIC_ACTION[0:3]
Descriptor Statistic Action (STATISTIC_ACTION[0])
MSR Address
Type
Reset Value
Descriptor Statistic Action (STATISTIC_ACTION[1])
MSR Address
Type
Reset Value
78
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:24
23:8
Bit
7
6
5
4
3
Name
RSVD
PREDIV
WRAP
ZERO_AERR
ZERO_ASMI
ALWAYS_DEC
HIT_AERR
RSVD
GLIU0: 100000A2h
GLIU1: 400000A2h
R/W
00000000_00000000h
GLIU0: 100000A6h
GLIU1: 400000A6h
R/W
00000000_00000000h
31505E
Description
Reserved.
Pre-divider used for ALWAYS_DEC. The pre-divider is free running and extends the
depth of the counter.
Decrement Counter Beyond Zero and Wrap.
0: Disable wrap; counter stops when it reaches zero.
1: Enable wrap; counter decrements through 0 to all ones.
Assert AERR on Cnt = 0. Assert AERR when STATISTIC_CNT[x] = 0.
0: Disable.
1: Enable.
Assert ASMI on Cnt = 0. Assert ASMI when STATISTIC_CNT[x] = 0.
0: Disable.
1: Enable.
Always Decrement Counter. If enabled, the counter will decrement on every memory
clock, subject to the prescaler value PREDIV (bits [23:8]). Decrementing will continue
unless loading is occurring due to another action, or if the counter reaches zero and
WRAP is disabled (bit 7).
0: Disable.
1: Enable.
Assert AERR on Descriptor Hit. The descriptor hits are ANDed with the masks and
then all ORed together.
0: Disable.
1: Enable.
STATISTIC_ACTION[x] Bit Descriptions
STATISTIC_ACTION[x] Register Map
PREDIV
RSVD
Descriptor Statistic Action (STATISTIC_ACTION[2])
MSR Address
Type
Reset Value
Descriptor Statistic Action (STATISTIC_ACTION[3])
MSR Address
Type
Reset Value
GeodeLink™ Inteface Unit Register Descriptions
GLIU0: 100000AAh
GLIU1: 400000AAh
R/W
00000000_00000000h
GLIU0: 100000AEh
GLIU1: 400000AEh
R/W
00000000_00000000h
AMD Geode™ GX Processors Data Book
9
8
7
6
5
4
3
2
1
0