AGXD533AAXF0CC AMD (ADVANCED MICRO DEVICES), AGXD533AAXF0CC Datasheet - Page 215

no-image

AGXD533AAXF0CC

Manufacturer Part Number
AGXD533AAXF0CC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AGXD533AAXF0CC

Device Core
X86
Device Core Size
64b
Frequency (max)
400MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.58V
Operating Supply Voltage (min)
1.42V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
368
Package Type
BGD
Lead Free Status / Rohs Status
Not Compliant
GeodeLink™ Memory Controller Register Descriptions
6.2.2.15 Page Open Status (MC_CF_PG_OPEN)
MSR Address
Type
Reset Value
6.2.2.16 Read Sync Control (MC_CF_RDSYNC)
MSR Address
Type
Reset Value
AMD Geode™ GX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:16
63:60
59:52
51:44
43:42
15:8
Bit
7:0
Bit
RSVD
Name
RSVD
PGOPEN1
PGOPEN0
Name
RSVD
RDSYNC_OLD
RDSYNC_PASS
RSVD
2000001Eh
RO
00000000_0000FFFFh
2000001Fh
R/W
00000000_00000000h
RDSYNC_OLD
RSVD
Description
Reserved. Reads as 0.
Page Open DIMM1. Page open indication of the second DIMM. Each bit position repre-
sents a page and a 1 indicates an open page. All pages are initialized ‘open’. After reset,
a ‘precharge all’ command closes all the banks.
Page Open DIMM0. Page open indication of the first DIMM. Each bit position represents
a page and a 1 indicates an open page. All pages are initialized ‘open’. After reset, a ‘pre-
charge all’ command closes all the banks.
Description
Reserved. Write as read.
RDSYNC Old. Overrides the eight ‘old’ signals that are normally computed by the
GLMC’s read sync logic for each byte of read data. A value of 1 indicates to the GLMC
to use registered data for that byte. (Default: 00h)
RDSYNC Pass. Overrides the eight ‘pass’ signals that are normally computed by the
GLMC’s read sync logic for each byte of read data. A value of 1 indicates to the GLMC
to use unregistered data for that byte. (Default: 00h)
Reserved. Write as read.
MC_CF_PG_OPEN Bit Descriptions
MC_CF_RDSYNC Bit Descriptions
MC_CF_PG_OPEN Register Map
MC_CF_RDSYNC Register Map
RDSYNC_PASS
RDSYNC_CNT
RSVD
PGOPEN1
RSVD
9
9
8
8
31505E
7
7
RSVD
6
6
5
5
PGOPEN0
4
4
3
3
RSVD
2
2
1
1
215
0
0

Related parts for AGXD533AAXF0CC