AGXD533AAXF0CC AMD (ADVANCED MICRO DEVICES), AGXD533AAXF0CC Datasheet - Page 413

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AGXD533AAXF0CC

Manufacturer Part Number
AGXD533AAXF0CC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AGXD533AAXF0CC

Device Core
X86
Device Core Size
64b
Frequency (max)
400MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.58V
Operating Supply Voltage (min)
1.42V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
368
Package Type
BGD
Lead Free Status / Rohs Status
Not Compliant
GeodeLink™ Control Processor Register Descriptions
6.10.3.2
MSR Address
Type
Reset Value
This register has no writable bits. I/O reads to the lower byte of this register (with or without reading the other three bytes)
return 0 and cause the system to enter “C2 processor state” as defined by the GLIU1 power management spec; that is,
suspend the processor. I/O reads to the lower byte of this register may trigger an SMI if GLD_MSR_SMI is configured
appropriately. Note that the suspend starts after a delay specified in GLCP_TH_SD (MSR 4C00001Ch), which can allow for
SMI handling or any other preparations. P_LVL2_IN (MSR 4C00001Ch[12])can abort the suspend operation. MSR reads to
this register return 0 and performs no further action.
6.10.3.3
MSR Address
Type
Reset Value
This register is reserved for internal use by AMD.
6.10.3.4
MSR Address
Type
Reset Value
This register is reserved for internal use by AMD.
AMD Geode™ GX Processors Data Book
Bit
3:0
GLCP Level 2 (GLCP_LVL2)
Reserved
Reserved
Name
CLK_VAL
4C000019h
R/W - I/O Offset 04h
00000000_00000000h
4C00001Ah
RO - I/O Offset 08h
00000000_00000000h
4C00001Bh
R/W - I/O NA
00000000_00000000h
Description
Clock Throttling Value. The value 0000 is reserved and should not be used. The value
0001 yields the most throttling while the value 1111 has the effect of no throttling (1111 is
the reset value). Reads return value written. THT_EN (bit 4) must be low to change the
value of CLK_VAL. See also GLCP_TH_SF. During processor throttling, processor sus-
pend is applied the amount of time of “(15-CLK_VAL)*GLCP_TH_SF” and then removed
the amount of time of “CLK_VAL*GLCP_TH_SF”.
GLCP_CNT Bit Descriptions (Continued)
31505E
413

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