HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 9

• Manufacturer Part Number: HSDC-JAKIT1W2/DB
• Description: DAC/ADC LATTICE KIT
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of HSDC-JAKIT1W2/DB

• Main Purpose: Interface, ADC/DAC for Lattice ECP3 FPGA
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: ADC1413D, DAC1408D, ECP3 FPGA
• Primary Attributes: Loop Back Demo with 2 High Speed Converters
• Secondary Attributes: USB Powered
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6898

NXP Semiconductors
Table 5.
V
+85
maximum sample rate; PLL off unless otherwise specified.
DAC1408D650
Product data sheet
Symbol
Analog outputs (IOUTAP, IOUTAN, IOUTBP, IOUTBN)
I
V
R
C
E
E
Reference voltage output (GAPOUT)
V
I
V
Analog auxiliary outputs (AUXAP, AUXAN, AUXBP and AUXBN)
I
V
N
Input timing (Vin_p/Vin_n)
f
f
Output timing (IOUTAP, IOUTAN, IOUTBP, IOUTBN)
f
t
NCO frequency range; f
f
f
Low power NCO frequency range; f
f
O(fs)
O(ref)
O(aux)
data
bit
s
s
NCO
step
NCO
DDA(1V8)
O
O(ref)
O(aux)
o
o
DAC(aux)mono
O
G
O(ref)

C; typical values measured at V
= V
Characteristics
DDD
Parameter
full-scale output
current
output voltage
output resistance
output capacitance
offset error variation
gain error variation
reference output
voltage
reference output
current
reference output
voltage variation
auxiliary output current differential outputs
auxiliary output
voltage
auxiliary DAC
monotonicity
data rate
bit rate
sampling rate
settling time
NCO frequency
step frequency
NCO frequency
= 1.7 V to 1.9 V; V
s
= 650 Msps
…continued
DDA(3V3)
DDA(1V8)
s
= 650 Msps
Conditions
register value = 00h
(see
register = default value
(see
compliance range
external voltage 1.2 V
compliance range
guaranteed
2 interpolation
4 interpolation
8 interpolation
serial input
up to 0.5 LSB
register value = 00000000h
(see
register value = FFFFFFFFh
(see
reg value = 00000000h
(see
reg value = F8000000h
(see
All information provided in this document is subject to legal disclaimers.
= 3.13 V to 3.47 V; AGND and GND are shorted together; T
= V
Table 13
Table 13
Table 21
Table 21
Table 21
Table 21
DDD
Rev. 4 — 26 November 2010
= 1.8 V; V
and
and
to
to
to
to
Table
Table
Table
Table
Table
Table
DDA(3V3)
24)
24)
24)
24)
14)
14)
2, 4 or 8 interpolating DAC with JESD204A
= 3.3 V; T
Test
D
D
D
D
C
C
C
C
C
I
D
D
D
D
D
D
D
D
D
D
D
D
D
[1]
amb
Min
-
-
1.8
-
-
-
-
1.20
-
-
-
0
-
-
-
-
0.7
-
-
-
-
-
-
-
= +25
DAC1408D650

C; R
Typ
1.6
20
-
250
3
6
18
1.25
40
117
2.2
-
10
-
-
-
-
-
20
0
650
0.151
0
630
L
= 50
V
-
-
-
-
2
-
81.25
-
Max
-
-
1.29
-
-
-
312.5
162.5
3.125
650
-
-
-
-
-

© NXP B.V. 2010. All rights reserved.
amb
DDA(3V3)
; I
O(fs)
=

40
= 20 mA;

Unit
mA
mA
V
k
pF
ppm/C
ppm/C
V
A
ppm/C
mA
V
bits
Msps
Msps
Msps
Gbps
Msps
ns
MHz
MHz
Hz
MHz
MHz
C to
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