HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 50

• Manufacturer Part Number: HSDC-JAKIT1W2/DB
• Description: DAC/ADC LATTICE KIT
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of HSDC-JAKIT1W2/DB

• Main Purpose: Interface, ADC/DAC for Lattice ECP3 FPGA
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: ADC1413D, DAC1408D, ECP3 FPGA
• Primary Attributes: Loop Back Demo with 2 High Speed Converters
• Secondary Attributes: USB Powered
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6898

NXP Semiconductors
Table 57.
Default settings are shown highlighted.
Table 58.
Default settings are shown highlighted.
DAC1408D650
Product data sheet
Bit
3
2
1
0
Bit
2 to 0
Symbol
JD_ODD
MDS_PRERUN
MDS_LOCKOUT
MDS_LOCK
Symbol
PAGE[2:0]
MDS_STATUS1 register (address 0Ah) bit description
PAGE_ADDRESS register (address 1Fh) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 November 2010
Access
R
R
R
R
Access
R/W
Value
0
1
0
1
0
1
0
1
Value
0h
2, 4 or 8 interpolating DAC with JESD204A
Description
MDS start mode
MDS pre-run phase active flag
MDS lockout detected flag
MDS lock flag
Description
page address
MDS start aligned to cdi-even sample
MDS start aligned to cdi-odd sample (only for ^2)
false
true
false
true
false
true
DAC1408D650
© NXP B.V. 2010. All rights reserved.
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