HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 6

• Manufacturer Part Number: HSDC-JAKIT1W2/DB
• Description: DAC/ADC LATTICE KIT
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of HSDC-JAKIT1W2/DB

• Main Purpose: Interface, ADC/DAC for Lattice ECP3 FPGA
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: ADC1413D, DAC1408D, ECP3 FPGA
• Primary Attributes: Loop Back Demo with 2 High Speed Converters
• Secondary Attributes: USB Powered
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6898

NXP Semiconductors
7. Limiting values
8. Thermal characteristics
DAC1408D650
Product data sheet
Table 2.
[1]
[2]
Table 3.
In accordance with the Absolute Maximum Rating System (IEC 60134).
Table 4.
[1]
Symbol
VIN_N0
VIN_P0
V
Symbol
V
V
V
T
T
T
Symbol
VIN_P1
VIN_N1
VIN_N2
VIN_P2
V
VIN_P3
VIN_N3
n.c.
n.c.
JTAG
GND
R
R
stg
amb
j
DDD(1V8)
DDD(1V8)
DDA(3V3)
DDA(1V8)
DDD
th(j-a)
th(j-c)
P: power supply; G: ground; I: input; O: output.
H = heatsink (exposed die pad to be soldered to GND. A minimum of 81 thermal vias are required).
Complies with JEDEC test board, in free air.
Pin description
Limiting values
Thermal characteristics
Parameter
analog supply voltage (3.3 V)
analog supply voltage (1.8 V)
digital supply voltage
storage temperature
ambient temperature
junction temperature
Parameter
thermal resistance from junction to ambient
thermal resistance from junction to case
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 November 2010
Pin
52
53
54
55
56
57
58
59
60
61
62
63
64
H
[2]
…continued
Type
I
I
P
I
I
I
I
P
I
I
-
-
I
G
[1]
Description
serial interface lane 0 negative input
serial interface lane 0 positive input
digital supply voltage 1.8 V
serial interface lane 1 positive input
serial interface lane 1 negative input
serial interface lane 2 negative input
serial interface lane 2 positive input
digital supply voltage 1.8 V
serial interface lane 3 positive input
serial interface lane 3 negative input
not connected
not connected
JTAG test mode select (must be grounded)
ground
2, 4 or 8 interpolating DAC with JESD204A
Conditions
Conditions
DAC1408D650
Min
0.5
0.5
0.5
55
40
40
© NXP B.V. 2010. All rights reserved.
[1]
[1]
Typ
18.7
6.7
Max
+4.6
+2.5
+2.5
+150
+85
+125
Unit
K/W
K/W
6 of 98
Unit
V
V
V
C
C
C