HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 2

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HSDC-JAKIT1W2/DB

Manufacturer Part Number
HSDC-JAKIT1W2/DB
Description
DAC/ADC LATTICE KIT
Manufacturer
NXP Semiconductors
Series
-r

Specifications of HSDC-JAKIT1W2/DB

Main Purpose
Interface, ADC/DAC for Lattice ECP3 FPGA
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
ADC1413D, DAC1408D, ECP3 FPGA
Primary Attributes
Loop Back Demo with 2 High Speed Converters
Secondary Attributes
USB Powered
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6898
NXP Semiconductors
3. Applications
4. Ordering information
Table 1.
DAC1408D650
Product data sheet
Type number
DAC1408D650HN
Ordering information
Package
Name
HVQFN64
Two’s complement or binary offset data
format
LMF = 421 or LMF = 211 support
Differential CML receiver with
embedded termination
Synchronization of multiple DAC outputs
Wireless infrastructure: LTE, WiMAX, GSM, CDMA, WCDMA, TD-SCDMA
Communication: LMDS/MMDS, point-to-point
Direct Digital Synthesis (DDS)
Broadband wireless systems
Digital radio links
Instrumentation
Automated Test Equipment (ATE)
Description
plastic thermal enhanced very thin quad flat package; no leads;
64 terminals; body 9  9  0.85 mm
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 November 2010
2, 4 or 8 interpolating DAC with JESD204A
Fully compatible SPI port
Industrial temperature range from
40 C to +85 C
Integrated PLL can be bypassed
Embedded complex modulator
DAC1408D650
© NXP B.V. 2010. All rights reserved.
Version
SOT804-3
2 of 98

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