PI7C8154ANAE Pericom Semiconductor, PI7C8154ANAE Datasheet - Page 113

• Manufacturer Part Number: PI7C8154ANAE
• Description: IC PCI-PCI BRIDGE ASYNC 304-PBGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8154ANAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 304-BGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19
19.1
Pericom PI7C8154/A/B provides direct replacement to Intel 21154.
Following table is PI7C8154/A/B pin comparison to Intel 21154
λ
λ
λ
λ
λ
λ
λ
λ
λ
λ
Pin Number
Pin A22: VDD / *EEDATA – For 8154A/B, this pin is used as VDD and serial data interface for
EEPROM. For Intel 21154, this pin is defined as VDD.
Pin A23: VSS / *EECLK – For 8154A/B, this pin is used as VSS and serial clock interface for EEPROM.
For Intel 21154, this pin is defined as VSS.
Pin B6: VDD / *NC – For 8154/A, this pin is defined as power pin. For 8154B, this pin can be no
connected. For Intel 21154 is defined as VDD
Pin D11: PMEENA_L is used to indicate the secondary devices are capable of asserting PME_L or not. For
Intel 21154, this pin is defined as VDD.
Pin V20: For pin V20, it must be tied to ground. For Intel 21154, this pin is defined as VSS.
Pin Y18: For pin Y18, it must be tied to VDD. For Intel 21154, this pin is defined as VDD.
Pin AA22: VSS / *NC – For 8154/A, this pin is defined as ground pin. For 8154B, this pin can be no
connected. For Intel 21154, this pin is defined as VSS.
Pin AB1: VDD / *ASYNC_SEL# - For 8154/A, this pin is defined as power pin. For 8154B, this pin is
used as enables asynchronous mode for the bridge. For Intel 21154, this pin is defined as VDD.
Pin AB2: VSS / * ASYNC_CLKIN – For 8154/A, this pin is defined as ground pin. For 8154B, this pin is
used as an external clock input in order to generate the secondary clock outputs (S_CLKOUT [9:0]) when
enabled by ASYNC_SEL#. For Intel 21154, this pin is defined as VSS.
Pin AC22: VDD / * EE_EN# – For 8154, this pin is defined as power pin. For 8154A/B, this pin is used as
enable EEPROM interface when it is tied low. For Intel 21154, this pin is defined as VDD.
AA22
0: Secondary bus clock outputs (S_CLKOUT [9:0]) will use the clock signal from ASYNC_CLKIN input instead of
1: Secondary bus clock outputs (S_CLKOUT [9:0]) will use the P_CLK input for synchronous operation.
AC22
AB1
AB2
A22
A23
D11
V20
Y18
B6
APPENDIX
the P_CLK.
PI7C8154/A/B vs. Intel 21154, PBGA-304
VDD / * EEDATA
VSS / * EECLK
VDD / *NC
PMEENA_L
Reserved
Reserved
VSS / * NC
VDD / *ASYNC_SEL#
VSS / * ASYNC_CLKIN
VDD / * EE_EN#
PI7C8154/A/B
VDD
VSS
VDD
VDD
VSS
VDD
VSS
VDD
VSS
VDD
Page 113 of 114
Intel 21154
ASYNCHRONOUS 2-PORT
DEC 2009 REVISION 1.02
PCI-to-PCI BRIDGE
Advance Information
PI7C8154A