ENC424J600-I/ML Microchip Technology, ENC424J600-I/ML Datasheet - Page 42

• Manufacturer Part Number: ENC424J600-I/ML
• Description: IC ETHERNET CTRLR W/SPI 44-QFN
• Manufacturer: Microchip Technology

Specifications of ENC424J600-I/ML

• Package / Case: 44-QFN
• Controller Type: Ethernet Controller
• Interface: SPI
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 96mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 117 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ENC424J600/624J600
TABLE 4-1:
DS39935C-page 40
Bank 0 Select
Bank 1 Select
Bank 2 Select
Bank 3 Select
System Reset
Flow Control Disable
Flow Control Single
Flow Control Multiple
Flow Control Clear
Decrement Packet Counter
DMA Stop
DMA Start Checksum
DMA Start Checksum with Seed
DMA Start Copy
DMA Start Copy and Checksum with Seed
Request Packet Transmission
Enable RX
Disable RX
Enable Interrupts
Disable Interrupts
Read Bank Select
Write EGPRDPT
Read EGPRDPT
Write ERXRDPT
Read ERXRDPT
Write EUDARDPT
Read EUDARDPT
Write EGPWRPT
Read EGPWRPT
Write ERXWRPT
Read ERXWRPT
Write EUDAWRPT
Read EUDAWRPT
Read Control Register
Write Control Register
Read Control Register Unbanked
Write Control Register Unbanked
Bit Field Set
Bit Field Clear
Bit Field Set Unbanked
Bit Field Clear Unbanked
Read EGPDATA
Write EGPDATA
Read ERXDATA
Write ERXDATA
Read EUDADATA
Write EUDADATA
Legend:
x/X = read data, d/D = write data, a = banked SFR address, A = unbanked SFR address. ‘X’ and ‘D’ are optional.
Instruction
SPI INSTRUCTION SET
B0SEL
B1SEL
B2SEL
B3SEL
SETETHRST
FCDISABLE
FCSINGLE
FCMULTIPLE
FCCLEAR
SETPKTDEC
DMASTOP
DMACKSUM
DMACKSUMS
DMACOPY
DMACOPYS
SETTXRTS
ENABLERX
DISABLERX
SETEIE
CLREIE
RBSEL
WGPRDPT
RGPRDPT
WRXRDPT
RRXRDPT
WUDARDPT
RUDARDPT
WGPWRPT
RGPWRPT
WRXWRPT
RRXWRPT
WUDAWRPT
RUDAWRPT
RCR
WCR
RCRU
WCRU
BFS
BFC
BFSU
BFCU
RGPDATA
WGPDATA
RRXDATA
WRXDATA
RUDADATA
WUDADATA
Mnemonic
1100 0000
1100 0010
1100 0100
1100 0110
1100 1010
1110 0000
1110 0010
1110 0100
1110 0110
1100 1100
1101 0010
1101 1000
1101 1010
1101 1100
1101 1110
1101 0100
1110 1000
1110 1010
1110 1100
1110 1110
1100 1000
0110 0000
0110 0010
0110 0100
0110 0110
0110 1000
0110 1010
0110 1100
0110 1110
0111 0000
0111 0010
0111 0100
0111 0110
000a aaaa
010a aaaa
0010 0000
0010 0010
100a aaaa
101a aaaa
0010 0100
0010 0110
0010 1000
0010 1010
0010 1100
0010 1110
0011 0000
0011 0010
1st Byte
xxxx xxxx
dddd dddd
xxxx xxxx
dddd dddd
xxxx xxxx
dddd dddd
xxxx xxxx
dddd dddd
xxxx xxxx
dddd dddd
xxxx xxxx
dddd dddd
xxxx xxxx
xxxx xxxx
dddd dddd
AAAA AAAA
AAAA AAAA
dddd dddd
dddd dddd
AAAA AAAA
AAAA AAAA
xxxx xxxx
dddd dddd
xxxx xxxx
dddd dddd
xxxx xxxx
dddd dddd
2nd Byte
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Instruction
 2010 Microchip Technology Inc.
DDDD DDDD
XXXX XXXX
DDDD DDDD
XXXX XXXX
DDDD DDDD
XXXX XXXX
DDDD DDDD
XXXX XXXX
DDDD DDDD
XXXX XXXX
DDDD DDDD
XXXX XXXX
XXXX XXXX
DDDD DDDD
xxxx xxxx
dddd dddd
DDDD DDDD
DDDD DDDD
dddd dddd
dddd dddd
XXXX XXXX
DDDD DDDD
XXXX XXXX
DDDD DDDD
XXXX XXXX
DDDD DDDD
3rd Byte
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XXXX XXXX
DDDD DDDD
XXXX XXXX
DDDD DDDD
DDDD DDDD
DDDD DDDD
DDDD DDDD
DDDD DDDD
XXXX XXXX
DDDD DDDD
XXXX XXXX
DDDD DDDD
XXXX XXXX
DDDD DDDD
Nth Byte
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