ENC424J600-I/ML Microchip Technology, ENC424J600-I/ML Datasheet - Page 108

• Manufacturer Part Number: ENC424J600-I/ML
• Description: IC ETHERNET CTRLR W/SPI 44-QFN
• Manufacturer: Microchip Technology

Specifications of ENC424J600-I/ML

• Package / Case: 44-QFN
• Controller Type: Ethernet Controller
• Interface: SPI
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 96mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 117 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ENC424J600/624J600
11.2
11.2.1
Manual flow control is enabled by default on device
power-up and whenever the AUTOFC bit (ECON2<7>)
is cleared. Setting AUTOFC disables manual flow
control.
To begin manual flow control in Full-Duplex mode, set
FCOP<1:0> to one of the following combinations:
• Idle (‘ 00 ’): Flow control is disabled or Idle.
• Single Pause (‘ 01 ’): Transmit one pause frame for
• Continuous Pause (‘ 10 ’): Periodically transmit
• End (‘ 11 ’): Transmit one pause frame with a timer
In Half-Duplex mode, set FCOP<1:0> to ‘ 10 ’ to begin
flow control and to ‘ 00 ’ to terminate flow control.
DS39935C-page 106
Note:
the time indicated in EPAUS; automatically
returns to the Idle state (‘ 00 ’).
pause frames using the value indicated in EPAUS
for an indefinite time; must be terminated using
End (‘ 11 ’).
of 0000h, then return to the Idle state (‘ 00 ’).
Manual and Automatic Flow
Control
When flow control is used in conjunction
with auto-negotiation, also set the ADPAUS
bits (PHANA<11:10>) to ‘ 01 ’ during initial-
ization. See Section 12.0 “Speed/Duplex
Configuration and Auto-Negotiation” for
more information.
MANUAL FLOW CONTROL
11.2.2
When the AUTOFC bit is set, the ENCX24J600 auto-
matically initiates flow control operation when the
amount of data in the receive buffer crosses an upper
threshold value. Flow control automatically terminates
once the amount of pending data shrinks below a lower
threshold. These thresholds, or “watermarks”, are
determined by the upper and lower bytes (respectively)
of the Receive Watermark register, ERXWM. These
thresholds represent 96-byte blocks.
For example, setting the RXFWM bits to 20h and the
RXEWM bits to 10h initiates flow control when more
than 3072 bytes of data are present in the buffer. Flow
control terminates when fewer than 1536 bytes of data
are in the buffer.
In Automatic mode, the value of FCOP<1:0> is
controlled by the device and must not be changed by
software. These bits, however, can be used as status
bits to determine what state the automatic flow control
engine is in. A value of ‘ 10 ’ indicates flow control is
active, while ‘ 00 ’ indicates that flow control is Idle.
To use automatic flow control:
1.
2.
3.
4.
Note:
Set the EPAUS register to indicate how many
pause quanta should be specified in each
control frame. It is recommended that the default
value be used.
Set RXFWM<7:0> (ERXWM<15:8>) to indicate
when flow control is to begin. When this number
of 96-byte blocks is consumed in the receive
buffer, the device considers its receive buffer to
be full and initiates flow control. Use the default
value of 16 if the full threshold is to be set at
1536 bytes.
Set RXEWM<7:0> (ERXWM<7:0>) to indicate
when flow control is to end. When the number of
occupied 96-byte blocks falls below this level,
the device considers its receive buffer to be
empty enough to receive more data. Use the
default value of 15 if the empty threshold is to be
set at 1440 bytes.
Set AUTOFC (ECON2<7>) to give control of the
FCOP<1:0> bits to the automatic flow control
hardware.
AUTOMATIC FLOW CONTROL
Setting RXFWM to be equal to RXEWM
(i.e., no hysteresis between full and empty)
is not permitted. For automatic flow control
to operate correctly, RXEWM must always
be at least one less than RXFWM, implying
at least 96 bytes of hysteresis.
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