ENC424J600-I/ML Microchip Technology, ENC424J600-I/ML Datasheet - Page 39

• Manufacturer Part Number: ENC424J600-I/ML
• Description: IC ETHERNET CTRLR W/SPI 44-QFN
• Manufacturer: Microchip Technology

Specifications of ENC424J600-I/ML

• Package / Case: 44-QFN
• Controller Type: Ethernet Controller
• Interface: SPI
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 96mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 117 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The user-defined area start address, EUDAST, is a
read/write register. For wrapping to work correctly, the
hardware enforces 16-bit even word alignment of this
register by internally having the Least Significant bit
tied off to ‘0’. Similarly, the user-defined area end
address, EUDAND, is a read/write register that is
forced to an odd memory address. The Least Signifi-
cant bit of EUDAND is internally tied to ‘1’. Applications
wishing to set up general purpose circular FIFOs in
memory using these hardware features must observe
these same alignment requirements.
If the user-defined area end address, EUDAND, is at a
higher memory address relative to the start address,
EUDAST, the buffer wraps to either EUDAST or the
beginning of memory, depending on where the
EUDARDPT or EUDAWRPT Pointers are located. This
is shown in Case 1 of Figure 3-8.
In some cases (for example, when accessing
fragmented data), it may be useful to place the
EUDAST Pointer at a higher memory address relative
to the end address. When organized in such a manner,
an “exclusion zone” in the middle of the memory range
is created; sequential read/write operations with the
FIGURE 3-8:
 2010 Microchip Technology Inc.
Normal User-Defined Buffer
EUDAND > EUDAST
General Purpose
Circular RX FIFO
Unimplemented
User-Defined
Case 1:
Buffer
Buffer
Buffer
CIRCULAR BUFFER WRAPPING USING THE EUDATA WINDOW
0000h
EUDAST
EUDAND
5FFFh
User-Defined Buffer with
EUDAST > EUDAND
“Exclusion Zone”
Circular RX FIFO
General Purpose
Unimplemented
Excluded
Case 2:
Buffer
Buffer
ENC424J600/624J600
user-defined area pointers will jump over the range of
addresses between EUDAND and EUDAST. This is
shown in Case 2.
If the user-defined buffer is not needed, it can
effectively be disabled by setting EUDAST and
EUDAND to addresses outside of the implemented
memory area. For example, if EUDAST is set to 6000h
and EUDAND is set to 6001h, EUDARDPT and
EUDAWRPT will never reach these addresses.
Instead, they wrap from the end of implemented RAM
to its beginning, as shown in Case 3.
When the user-defined buffer is disabled, the host con-
troller can use the EUDADATA interface as a second
general purpose window into RAM. Unlike the original
general purpose pointers, however, EUDARDPT and
EUDAWRPT do not wrap at the ERXST boundary,
thereby allowing access to the full SRAM buffer area.
This may be beneficial for debugging and testing
purposes where it may be desirable to read or write the
entire SRAM buffer in a single operation.
0000h
EUDAND
EUDAST
5FFFh
EUDAST and EUDAND > 5FFFh
User-Defined Buffer Disabled
Circular RX FIFO
General Purpose
Unimplemented
Buffer
Buffer
Case 3:
DS39935C-page 37
0000h
5FFFh
EUDAST
EUDAND