ENC424J600-I/ML Microchip Technology, ENC424J600-I/ML Datasheet - Page 13

• Manufacturer Part Number: ENC424J600-I/ML
• Description: IC ETHERNET CTRLR W/SPI 44-QFN
• Manufacturer: Microchip Technology

Specifications of ENC424J600-I/ML

• Package / Case: 44-QFN
• Controller Type: Ethernet Controller
• Interface: SPI
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 96mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 117 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.4
Typical applications for ENC424J600/624J600 devices
require an Ethernet transformer module, and a few
resistors and capacitors to implement a complete
IEEE 802.3 compliant 10/100 Ethernet interface, as
shown in Figure 2-5.
The Ethernet transmit interface consists of two pins:
TPOUT+ and TPOUT-. These pins implement a
differential pair and a current-mode transmitter. To
generate an Ethernet waveform, ordinary applications
require the use of a 1:1 center tapped pulse
transformer, rated for 10/100 or 10/100/1000 Ethernet
operations. When the Ethernet module is enabled and
linked with a partner, current is continually sunk
through both TPOUT pins. When the PHY is actively
transmitting, a differential voltage is created on the
Ethernet cable by varying the relative current sunk by
TPOUT+ compared to TPOUT-.
The Ethernet receive interface similarly consists of a
differential pair: TPIN+ and TPIN-. To meet IEEE 802.3
compliance and help protect against electrostatic dis-
charge, these pins are normally isolated from the
Ethernet cable by a 1:1 center tapped transformer
(available in the same package as the TX transformer).
Internally, the PHY uses a high-speed ADC to sample
the receive waveform and decodes it using a DSP. The
PHY implements many robustness features, including
FIGURE 2-5:
 2010 Microchip Technology Inc.
ENCX24J600
Ethernet Signal Pins and External
Magnetics
TPOUT
TPOUT
TPIN
TPIN
+
+
-
-
TYPICAL ETHERNET MAGNETICS CONNECTIONS
49.9, 1%
49.9, 1%
49.9, 1%
49.9, 1%
3.3V
0.01 F
6.8 nF, 10%
6.8 nF, 10%
10, 1/12W, 1%
0.01 F
1:1 CT
1:1 CT
ENC424J600/624J600
baseline wander correction (applicable to 100Base-TX)
and automatic RX polarity correction (applicable to
10Base-T).
Four 49.9Ω, 1% resistors are required for proper
termination of the TX and RX transmission lines. If the
board layout necessitates long traces between the
ENCX24J600 and Ethernet transformers, the termina-
tion resistors should be placed next to the silicon
instead of the transformers.
On the receive signal path, two 6.8 nF 10% capacitors
are used. These capacitors, in combination with the
49.9 termination resistors, form an RC high-pass filter
to reduce baseline wander. For best performance,
these capacitors should not be omitted or changed.
The various remaining capacitors provide DC current
blocking and provide stability to the common-mode
voltage of both of the differential pairs. The TPIN+/-
pins weakly output a common-mode voltage that is
acceptable to the internal ADC. For proper operation,
do not attempt to externally force the TPIN+/-
common-mode voltage to some other value.
The 10Ω 1% resistor provides a current path from the
power supply to the center tap of the TX transformer.
As
implement a Current mode drive topology in which the
pins are only capable of sinking current; they do not
produce a direct voltage. This current path through the
transformer generates the transmit waveform. The 10Ω
resistor reduces the amount of heat that the PHY would
have to dissipate, and therefore, must have a power
rating of 1/12W or better.
mentioned
previously,
75
75
75 75
the
1000 pF, 2 kV
DS39935C-page 11
TPOUT+/-
RJ-45
1
2
3
4
5
6
7
8
1
pins