ENC424J600-I/ML Microchip Technology, ENC424J600-I/ML Datasheet - Page 113

• Manufacturer Part Number: ENC424J600-I/ML
• Description: IC ETHERNET CTRLR W/SPI 44-QFN
• Manufacturer: Microchip Technology

Specifications of ENC424J600-I/ML

• Package / Case: 44-QFN
• Controller Type: Ethernet Controller
• Interface: SPI
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 96mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 117 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 12-2:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R-0
R-0
r
r
This is the only valid state for this bit; a ‘ 0 ’ represents an invalid condition.
Reserved: Read as ‘ 0 ’
FULL100: 100Base-TX Full-Duplex Ability Status bit
1 = PHY is capable of 100Base-TX full-duplex operation
HALF100: 100Base-TX Half-Duplex Ability Status bit
1 = PHY is capable of 100Base-TX half-duplex operation
FULL10: 10Base-T Full-Duplex Ability Status bit
1 = PHY is capable of 10Base-T full-duplex operation
HALF10: 10Base-T Half-Duplex Ability Status bit
1 = PHY is capable of 10Base-T half-duplex operation
Reserved: Ignore on read
ANDONE: Auto-Negotiation Done Status bit
1 = Auto-negotiation is complete
0 = Auto-negotiation is disabled or still in progress
LRFAULT: Latching Remote Fault Condition Status bit
1 = Remote Fault condition has been detected. This bit latches high and automatically returns to ‘ 0 ’
0 = No remote Fault has been detected since the last read of PHSTAT1
ANABLE: Auto-Negotiation Ability Status bit
1 = PHY is capable of auto-negotiation
LLSTAT: Latching Link Status bit
1 = Ethernet link is established and has stayed continuously established since the last read of
0 = Ethernet link is not established or was not established for a period since the last read of PHSTAT1
Reserved: Ignore on read
EXTREGS: Extended Capabilities Registers Present Status bit
1 = PHY has extended capability registers at addresses, 16 thru 31
FULL100
R-1
after PHSTAT1 is read.
PHSTAT1
R-0
r
PHSTAT1: PHY STATUS REGISTER 1
(1)
LL = Latch Low bit
W = Writable bit
‘1’ = Bit is set
HALF100
ANDONE
R-1
R-0
(1)
LRFAULT
FULL10
R/LH-0
R-1
(1)
(1)
U = Unimplemented bit, read as ‘0’
LH = Latch High bit
‘0’ = Bit is cleared
ENC424J600/624J600
ANABLE
HALF10
R-1
R-1
(1)
(1)
(1)
(1)
(1)
(1)
LLSTAT
R/LL-0
R-0
r
(1)
LL = Latch-Low bit
x = Bit is unknown
R-0
R-0
r
r
DS39935C-page 111
EXTREGS
R-1
R-0
r
(1)
bit 8
bit 0