ENC424J600-I/ML Microchip Technology, ENC424J600-I/ML Datasheet - Page 29

• Manufacturer Part Number: ENC424J600-I/ML
• Description: IC ETHERNET CTRLR W/SPI 44-QFN
• Manufacturer: Microchip Technology

Specifications of ENC424J600-I/ML

• Package / Case: 44-QFN
• Controller Type: Ethernet Controller
• Interface: SPI
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 96mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 117 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 3-7:
MICMD
MIREGADR
MAADR3
MAADR2
MAADR1
MIWR
MIRD
MISTAT
EPAUS
ECON2
ERXWM
EIE
EIDLED
EGPDATA
ERXDATA
EUDADATA
EGPRDPT
EGPWRPT
ERXRDPT
ERXWRPT
EUDARDPT
EUDAWRPT
Legend:
Name
File
16-Bit
8-Bit
— = unimplemented, read as ‘0’; q = unique MAC address or silicon revision nibble; r = reserved bit, do not modify; x = Reset value unknown. Reset values are shown in hexadecimal for each byte.
MII Management Write Data, High Byte (MIWR<15:8>)
MII Management Read Data, High Byte (MIRD<15:8>)
Pause Timer Value, High Byte (EPAUS<15:8>)
MAC Address, Byte 6 (MAADR<7:0>)
MAC Address, Byte 4 (MAADR<23:16>)
MAC Address, Byte 2 (MAADR<39:32>)/OUI Byte 2
RXFWM7
LACFG3
ETHEN
Bit 15
INTIE
Bit 7
—
—
—
—
—
—
—
—
—
r
r
r
ENC424J600/624J600 REGISTER FILE SUMMARY (CONTINUED)
General Purpose Window Read Pointer, High Byte (ETXRDPT<14:8>)
General Purpose Window Write Pointer, High Byte (ETXWRPT<14:8>)
RX Window Read Pointer, High Byte (ERXRDPT<14:8>)
RX Window Write Pointer, High Byte (ERXWRPT<14:8>)
MODEXIE
RXFWM6 RXFWM5
UDA Window Read Pointer (EUDARDPT<14:8>)
UDA Window Write Pointer (EUDAWRPT<14:8>)
LACFG2
STRCH
Bit 14
Bit 6
—
—
—
r
r
r
LACFG1
HASHIE
TXMAC
Bit 13
Bit 5
—
—
—
r
r
r
High Byte (‘H’ Register)
SHA1MD5
RXFWM4
LACFG0
AESIE
Bit 12
Bit 4
—
—
r
r
r
r
COCON3
RXFWM3
LBCFG3
LINKIE
Bit 11
Bit 3
—
—
r
r
r
r
RXFWM2 RXFWM1 RXFWM0 RXEWM7 RXEWM6 RXEWM5 RXEWM4 RXEWM3
COCON2 COCON1 COCON0
LBCFG2
Bit 10
Bit 2
—
—
r
r
r
r
r
LBCFG1
Bit 1
Bit 9
—
—
r
r
r
r
r
LBCFG0
Bit 0
Bit 8
—
—
r
r
r
r
r
MII Management Write Data, Low Byte (MIWR<7:0>)
MII Management Read Data, Low Byte (MIRD<7:0>)
Pause Timer Value, Low Byte (EPAUS<7:0>)
General Purpose Window Read Pointer, Low Byte (ETXRDPT<7:0>)
General Purpose Window Write Pointer, Low Byte (ETXWRPT<7:0>)
RX Window Read Pointer, Low Byte (ERXRDPT<7:0>)
RX Window Write Pointer, Low Byte (ERXWRPT<7:0>)
MAC Address, Byte 3 (MAADR<31:24>)/OUI Byte 3
MAC Address, Byte 1 (MAADR<47:40>)/OUI Byte 1
UDA Window Read Pointer (EUDARDPT<7:0>)
MAC Address, Byte 5 (MAADR<15:8>)
General Purpose Data Window Register
Ethernet RX Data Window Register
User-Defined Area Data Window Register
UDA Window Write Pointer (EUDAWRPT<7:0>)
AUTOFC
DEVID2
Bit 7
Bit 7
—
—
—
r
DEVID1
TXRST
PKTIE
Bit 6
Bit 6
—
—
—
RXRST
DEVID0
DMAIE
Bit 5
Bit 5
—
—
—
Low Byte (‘L’ Register)
PHREG4
ETHRST MODLEN1 MODLEN0 AESLEN1 AESLEN0 CB, 00
REVID4
Bit 4
Bit 4
—
—
r
PHREG3
REVID3
TXIE
Bit 3
Bit 3
—
r
RXEWM2
PHREG2
TXABTIE
NVALID
REVID2
Bit 2
Bit 2
—
RXEWM1 RXEWM0 10, 0F
RXABTIE
MIISCAN
PHREG1
REVID1
SCAN
Bit 1
Bit 1
PHREG0 01, 00
PCFULIE 80, 10
REVID0
MIIRD
BUSY
Bit 0
Bit 0
--, 00
qq, qq
qq, a3
04, 00
00, 00
00, 00
--, 00
10, 00
26, qq
--, xx
--, xx
--, xx
05, FA
00, 00
05, FA
00, 00
05, FA
00, 00
Reset