MC68EC060RC66 Freescale Semiconductor, MC68EC060RC66 Datasheet - Page 189

• Manufacturer Part Number: MC68EC060RC66
• Description: IC MPU 32BIT 66MHZ 206-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC060RC66

• Processor Type: M680x0 32-Bit
• Speed: 66MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 206-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Operating Temp Range: 0C to 110C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 206
• Package Type: PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Bus Operation
instruction boundary (following any higher priority exception). The IPEND signal negates
after the interrupt acknowledge bus cycle.
IPEND is intended to provide status information, and must not be used to replace the inter-
rupt acknowledge cycle. As such, normal applications do not rely on IPEND to disable inter-
rupts. Applications that use IPEND as a replacement for the interrupt acknowledge cycle are
neither recommended nor supported.
The MC68060 takes an interrupt exception for a pending interrupt within one instruction
boundary after processing any other pending exception with a higher priority. Thus, the
MC68060 executes at least one instruction in an interrupt exception handler before recog-
nizing another interrupt request. The following paragraphs describe the various kinds of
interrupt acknowledge bus cycles that can be executed as part of interrupt exception pro-
cessing. Table 7-4 provides a summary of the possible interrupt acknowledge terminations
and the exception processing results. Note that TRA must always be negated for proper
operation in the MC68040 acknowledge termination mode.
7-34
Native-MC68060 Don’t Care
Native-MC68060 Don’t Care
Acknowledge
Termination
MC68040
MC68040
MC68040
Mode
Either
Either
Either
Don’t Care Don’t Care
Table 7-4. Interrupt Acknowledge Termination Summary
COMPARE REQUEST WITH MASK IN SR
IPLx RECOGNIZED
High
High
Low
Low
Low
TA
IPL2–IPL0
IPLx SYNCHRONIZED
IPEND
CLK
TEA
High
High
High
High
Low
Low
Low
Figure 7-26. Assertion of IPEND
Don’t Care Don’t Care
M68060 USER’S MANUAL
TRA
High
High
High
High
High
Low
Low
Don’t Care Insert Wait States
Don’t Care
Don’t Care
Don’t Care
Don’t Care Illegal Combination, Unsupported
AVEC
High
Low
Take Spurious Interrupt Exception
Register Vector Number on D7–D0 and Take Inter-
rupt Exception
Take Autovectored Interrupt Exception
Retry Interrupt Acknowledge Cycle
ASSERT IPEND
Termination Condition
MOTOROLA