MC68EC060RC66 Freescale Semiconductor, MC68EC060RC66 Datasheet - Page 166

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MC68EC060RC66

Manufacturer Part Number
MC68EC060RC66
Description
IC MPU 32BIT 66MHZ 206-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68EC060RC66

Processor Type
M680x0 32-Bit
Speed
66MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
206-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Operating Temp Range
0C to 110C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
206
Package Type
PGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Compliant
The combination of operand size and alignment determines the number of bus cycles
required to perform a particular memory access. Table 7-3 lists the number of bus cycles
required for different operand sizes with all possible alignment conditions for read and write
cycles. The table confirms that alignment significantly affects bus cycle throughput for non-
cachable accesses. For example, in Figure 7-9 the misaligned long-word operand took three
bus cycles because the byte offset = $1. If the byte offset = $0, then it would have taken one
MOTOROLA
MISCELLANEOUS
ATTRIBUTES
Figure 7-11. Misaligned Long-Word Read Bus Cycle Timing
SIZ1–SIZ0
D31–D24
D23–D16
D15–D8
A31–A2
A1–A0
D7–D0
BCLK
R/W
BS0
BS1
BS2
BS3
TIP
TA
TS
C1
READ
BYTE
BYTE
C2
1
M68060 USER’S MANUAL
BYTE 0
C1
WORD
READ
WORD
C2
2
BYTE 1
BYTE 2
C1
READ
BYTE
BYTE
C2
0
BYTE 3
Bus Operation
7-11

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