IP-10GETHERNET Altera, IP-10GETHERNET Datasheet - Page 14

• Manufacturer Part Number: IP-10GETHERNET
• Description: IP CORE - 10 Gbps Ethernet MAC PCS PMA Reference Design
• Manufacturer: Altera

Specifications of IP-10GETHERNET

• Software Application: IP CORE, Interface And Protocols, ETHERNET
• Supported Families: Quartus II
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

2–8
Figure 2–3. Top-Level Block Diagram for 10-Gbps Ethernet, ALTGX Transceiver, and ALTGX_RECONFIG Megafunction
2.2.5. ECC Options
2.3. Design Flows
Getting Started with the 10-Gbps Ethernet IP
Clock Source
37.5-50 MHz
f
f
reconfig_clk
For more information on the ALT2GXB_RECONFIG megafunction, refer to the
Stratix II GX ALT2GXB_RECONFIG Megafunction User
For Stratix IV devices, you can turn on ECC Protected RAMs option to configure
single-bit error correction, double-bit error detection (SECDED) for data words up to
64 bits wide on the transmit and receive FIFOs and in the Soft XAUI PCS memory, for
applications that require a highly-reliable 10-Gbps Ethernet solution. When you
generate the IP core by clicking Finish in the MegaWizard interface, an ALTECC
megafunction is automatically instantiated to implement this extra memory data
protection.
If you turn on the ECC Protected RAMs, the IP core includes a set of error insertion
registers to support ECC testing, and a set of ECC statistics counters that accumulate
the counts of various types of ECC errors as they are detected, corrected, or both
detected and corrected.
Turning on the ECC Protected RAMs affects the size and maximum achievable
frequency of your IP core. For example, turning on this feature increases the widths of
the ECC-protected FIFOs.
For information about the ALTECC megafunction, refer to the
(ALTECC_ENCODER and ALTECC_DECODER) Megafunctions User
The following sections explain how to customize your 10-Gbps Ethernet IP core using
the MegaWizard Plug-in Manager and SOPB Builder design flows.
reconfig_clk
ALTGX_RECONFIG Megafunction
reconfig_fromgxb[<n-1>:0]
reconfig_togxb[<n-1>:0]
Chapter 2: Getting Started with the 10-Gbps Ethernet IP
Guide.
reconfig_fromgxb[<n-1>:0]
reconfig_togxb[<n-1>:0]
reconfig_clk
cal_blk_clk
10G Ethernet IP Core
ALTGX or ALT2GX
Megafunction
© July 2010 Altera Corporation
Error Correction Code
Guide.
Design Flows