HPIXF1104BE.B1-994579 Cortina Systems Inc, HPIXF1104BE.B1-994579 Datasheet - Page 88

• Manufacturer Part Number: HPIXF1104BE.B1-994579
• Description: IC ETH MAC SPI3 4PORT 552-BGA
• Manufacturer: Cortina Systems Inc

Specifications of HPIXF1104BE.B1-994579

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-3
• Voltage - Supply: 1.2V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1020

IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
Note:
5.2.3
Cortina Systems
The following three TPA signals (DTPA_0:3, STPA, and PTPA) provide flow control based
on the programmable TX FIFO High and Low watermarks. Refer to
High Watermark Ports 0 - 3 ($0x600 – 0x603), on page 193
Watermark Register Ports 0 - 3 ($0x60A – 0x60D), on page 195
DTPA_0:3:
A direct status indication for the TX FIFOs of ports [0:3]. When DTPA is High, it indicates the
amount of data in the TX FIFO is below the TX FIFO High watermark. When the High
watermark is crossed, DTPA transitions Low to indicate the TX FIFO is almost full. It stays
low until the amount data in the TX FIFO goes back below the TX FIFO Low watermark. At
this point, DTPA transitions High to indicate the programmed number of bytes are now
available for data transfers.
DTPA_0:3 is updated on the rising edge of the TFCLK.
STPA:
STPA provides TX FIFO status for the currently selected port in MPHY mode. When High,
STPA indicates that the amount of data in the TX FIFO for the port selected, specified by the
latest in-band address, is below the TX FIFO High watermark. When the High watermark is
crossed, STPA transitions Low to indicate the TX FIFO is almost full. It stays Low until the
amount of data in the TX FIFO goes back below the TX FIFO Low watermark. At this point,
STPA transitions High to indicate the programmed number of bytes are now available for
data transfers.
The port reported by STPA is updated on the rising edge of TFCLK after TSX is sampled as
asserted. STPA is updated on the rising edge of TFCLK.
STPA is only used when the IXF1104 MAC is configured for MPHY mode of operation.
PTPA:
PTPA provides status of the TX FIFO based on the port selected by the TADR[1:0] address
bus.
When High, PTPA indicates that the amount of data in the TX FIFO for the port selected is
below the TX FIFO High watermark. When the High watermark is crossed, PTPA transitions
Low to indicate the TX FIFO is almost full. It stays Low until the amount of data in the TX
FIFO goes back below the TX FIFO Low watermark. PTPA then transitions High to indicate
the programmed number of bytes are now available for data transfers.
The port reported by PTPA is updated on the rising edge of TFCLK after the TADR{1:0] port
address is sampled.
PTPA is updated on the rising edge of TFCLK.
Pre-Pending Function
The IXF1104 MAC implements a pre-pending feature to allow 1518-byte Ethernet packets
to be pre-padded with two additional bytes of data so that the packet becomes low-word
aligned. The 2-byte pre-pend value is all zeros and is inserted before the destination
address of the packet being pre-pended. This value is fixed and cannot be changed.
®
• Dedicated per port Direct Transmit Packet Available (DTPA)
• Selected-PHY Transmit Packet Available (STPA), which is based on the current in-band
• Polled-PHY Transmit packet Available (PTPA), which provides FIFO information on the
IXF1104 4-Port Gigabit Ethernet Media Access Controller
port address in MPHY mode.
port selected by the TADR[1:0] signals.
and
Table 132, TX FIFO Low
for more information.
Table 131, TX FIFO
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