HPIXF1104BE.B1-994579 Cortina Systems Inc, HPIXF1104BE.B1-994579 Datasheet - Page 115

• Manufacturer Part Number: HPIXF1104BE.B1-994579
• Description: IC ETH MAC SPI3 4PORT 552-BGA
• Manufacturer: Cortina Systems Inc

Specifications of HPIXF1104BE.B1-994579

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-3
• Voltage - Supply: 1.2V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1020

IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
5.8.6.1.2
Table 35
5.9
Cortina Systems
Copper LED Behavior
LED Behavior (Copper Mode)
CPU Interface
The CPU interface block provides access to registers and statistics in the IXF1104 MAC.
The interface is asynchronous externally and operates within the 125 MHz clock domain
internally. The interface provides access to the following:
The CPU interface width can be configured with the two strap signals (UPX_WIDTH[1:0]) to
operate as an 8-bit, 16-bit, or 32-bit bus. All internal accesses to registers are 32-bit (4, 2, or
1 data cycles respectively are required to fully access a register). When operating in 8-bit or
16-bit mode, read data for bytes [3:1] is strobed into read holding registers when byte [0] is
read. Subsequent reads of bytes {1, 2, 3} in byte mode or of bytes {2,3} in 16-bit mode are
supplied from the holding register independent of the upper address bits. On write accesses
in 8-bit mode, the data of bytes {0, 1, 2} is similarly captured in internal write holding
registers and the complete 32-bit write is committed when byte[3] is written to the IXF1104
MAC. When writing in 16-bit mode, bytes [1:0] are captured, and the double-word is
committed when bytes [3:2] are written. The complete address for write is ignored (except
for the write which causes the commit operation).
®
Note:
• Receive statistics registers
• Transmit statistics registers
• Receive FIFO registers
• Transmit FIFO registers
• Global configuration and control registers
• MAC_0 to MAC_3 registers
IXF1104 4-Port Gigabit Ethernet Media Access Controller
Activity LED - Green
Link LED
Table 33, LED_DATA# Decodes
on page 180
is not enabled, all the LEDs for that port are off. If the LEDs are not enabled, all of the LEDs are off.
Type
and the LEDs are enabled in the
Off
Amber On
Amber Blinking
Green On
Off
Blinking
Status
assumes the port is enabled in the
Table 108, LED Control ($0x509), on page
Port does not have a remote fault and
Control ($0x509), on page 182
Port has an RGMII RXERR condition detected and
Table 108, LED Control ($0x509), on page 182
Port has a remote fault and
Disable ($0x50B), on page 183
Table 108, LED Control ($0x509), on page 182
and port does not have an RGMII RXERR error or
remote fault condition present.
Port is not transmitting and receiving data.
Table 108, LED Control ($0x509), on page 182
is transmitting and/or receiving.
Table 108, LED Control ($0x509), on page 182
Port is receiving data.
Table 102, Port Enable ($0x500),
Description
Table 110, LED Fault
bit is not set.
is not set.
Table 108, LED
182. If a port
set: Port
bit is set
bit is set
not set:
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