HPIXF1104BE.B1-994579 Cortina Systems Inc, HPIXF1104BE.B1-994579 Datasheet - Page 149

• Manufacturer Part Number: HPIXF1104BE.B1-994579
• Description: IC ETH MAC SPI3 4PORT 552-BGA
• Manufacturer: Cortina Systems Inc

Specifications of HPIXF1104BE.B1-994579

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-3
• Voltage - Supply: 1.2V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1020

IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
Figure 54
8.4
Note:
Table 58
Cortina Systems
The address vector for the IXF1104 MAC is 11 bits wide. This allows for 7 bits of port-
specific access and a 4-bit vector to address each port and all global registers. The address
format is shown in
Register Overview Diagram
Register Map
Table 58
present the IXF1104 MAC memory map details. Global control and status registers are used
to configure or report on all ports, and some registers are replicated on a per-port basis.
All IXF1104 MAC registers are 32 bits.
MAC Control Registers ($ Port Index + Offset) (Sheet 1 of 2)
®
Register
Station Address ($ Port_Index +0x00 – +0x01) Low
Station Address ($ Port_Index +0x00 – +0x01) High
Desired Duplex ($ Port_Index + 0x02)
FD FC Type ($ Port_Index + 0x03)
Reserved
Collision Distance ($ Port_Index + 0x05)
Collision Threshold ($ Port_Index + 0x06)
FC TX Timer Value ($ Port_Index + 0x07)
FD FC Address ($ Port_Index + 0x08 – + 0x09)
FDFCAddressLow
FD FC Address ($ Port_Index + 0x08 – + 0x09)
FDFCAddressHigh
IPG Receive Time 1 ($ Port_Index + 0x0A)
IPG Receive Time 2 ($ Port_Index + 0x0B)
IPG Transmit Time ($ Port_Index + 0x0C)
Reserved
Pause Threshold ($ Port_Index + 0x0E)
Max Frame Size (Addr: Port_Index + 0x0F)
MAC IF Mode and RGMII Speed ($ Port_Index + 0x10)
Flush TX ($ Port_Index + 0x11)
FC Enable ($ Port_Index + 0x12)
FC Back Pressure Length ($ Port_Index + 0x13)
Short Runts Threshold ($ Port_Index + 0x14)
IXF1104 4-Port Gigabit Ethernet Media Access Controller
10
through
Port Select & Global Registers
Table 68, Optical Module Registers ($ 0x799 - 0x79F), on page 155
Figure
54.
6
Bit Size
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
–
Mode
Per-Port Registers
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
R
1
Ref Page
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page 156
page 156
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page 157
page 157
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page 158
page 158
page 158
page 159
page 159
page 159
page 160
page 160
page 161
–
–
Offset
0x0A
0x0B
0x0C
0x0D
0x0E
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0F
0x10
0x11
0x12
0x13
0x14
0
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