HPIXF1104BE.B1-994579 Cortina Systems Inc, HPIXF1104BE.B1-994579 Datasheet - Page 197

• Manufacturer Part Number: HPIXF1104BE.B1-994579
• Description: IC ETH MAC SPI3 4PORT 552-BGA
• Manufacturer: Cortina Systems Inc

Specifications of HPIXF1104BE.B1-994579

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-3
• Voltage - Supply: 1.2V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1020

IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
Table 134
Cortina Systems
TX FIFO Overflow/Underflow/Out of Sequence Event ($0x61E)
®
Register Description: TX FIFO Out of Sequence Event:
These register bits provide status information, and indicate if out-of-sequence data has been
received. The bit position equals the port number + 8. These bits are cleared on Read.
Register Description: TX FIFO Underflow Event:
This register provides a status that a FIFO Empty situation has occurred (for example, a FIFO
under-run). The bit position equals the port number + 4. This register is cleared on Read.
Register Description: TX FIFO Overflow Event:
This register provides a status that a FIFO full situation has occurred (for example, a FIFO
overflow). The bit position equals the port number. This register is cleared on Read.
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
31:12
Bit
IXF1104 4-Port Gigabit Ethernet Media Access Controller
10
11
9
8
7
6
5
4
3
2
1
0
clear; R/W/C = Read/Write, Clear on Write
Name
Reserved
FOSE3
FOSE2
FOSE1
FOSE0
FUE3
FUE2
FUE1
FUE0
FOE3
FOE2
FOE1
FOE0
Reserved
Description
Port 3
0 = FIFO out of sequence event did not occur
1 = FIFO out of sequence event occurred
Port 2
0 = FIFO out of sequence event did not occur
1 = FIFO out of sequence event occurred
Port 1
0 = FIFO out of sequence event did not occur
1 = FIFO out of sequence event occurred
Port 0
0 = FIFO out of sequence event did not occur
1 = FIFO out of sequence event occurred
Port 3
0 = FIFO underflow event did not occur
1 = FIFO underflow event occurred
Port 2
0 = FIFO underflow event did not occur
1 = FIFO underflow event occurred
Port 1
0 = FIFO underflow event did not occur
1 = FIFO underflow event occurred
Port 0
0 = FIFO underflow event did not occur
1 = FIFO underflow event occurred
Port 3
0 = FIFO overflow event did not occur
1 = FIFO overflow event occurred
Port 2
0 = FIFO overflow event did not occur
1 = FIFO overflow event occurred
Port 1
0 = FIFO overflow event did not occur
1 = FIFO overflow event occurred
Port 0
0 = FIFO overflow event did not occur
1 = FIFO overflow event occurred
Type
RO
R
R
R
R
R
R
R
R
R
R
R
R
1
0x00000
Default
0x0
0x0
0x0
0
0
0
0
0
0
0
0
0
0
0
0
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