UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 504

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Notes 1.
Remark f
502
Item
System clock
CPU
Flash memory
RAM
Port (latch)
16-bit timer/event
counter
8-bit timer/event
counter
8-bit timer
Watch timer
Watchdog timer
Clock output
A/D converter
Serial interface
LCD controller/driver
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
Main system clock
Subsystem clock
f
RL
2.
f
f
f
f
f
RH
X
EXCLK
XT
EXCLKS
RL
STOP Mode Setting
PD78F0374, 78F0375, 78F0376, 78F0376D, 78F0384, 78F0385, 78F0386, 78F0386D only.
PD78F037x only.
:
:
:
Note2
:
Note1
:
: External subsystem clock
UART0
UART6
CSI10
IIC0
Internal high-speed oscillation clock
X1 clock
External main system clock
XT1 clock
Internal low-speed oscillation clock
f
f
f
f
f
RH
X
EXCLK
XT
EXCLKS
00
01
50
51
H0
H1
Note1
Clock supply to the CPU is stopped
Stopped
Input invalid
Status before STOP mode was set is retained
Operates or stops by external clock input
Status before STOP mode was set is retained
Operation stopped
Operation stopped
Status before STOP mode was set is retained
Status before STOP mode was set is retained
Operation stopped
Operable only when TI50 is selected as the count clock
Operable only when TI51 is selected as the count clock
Operable only when TM50 output is selected as the count clock during 8-bit timer/event counter
50 operation
Operable only when f
Operable only when subsystem clock is selected as the count clock
Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
Operable only when subsystem clock is selected as the count clock
Operation stopped
Operable only when TM50 output is selected as the serial clock during 8-bit timer/event counter
50 operation
Operable only when external clock is selected as the serial clock
Operable only when subsystem clock is selected as the count clock
Operation stopped
Operable
When CPU Is Operating on
Table 21-3. Operating Statuses in STOP Mode
Oscillation Clock (f
Internal High-Speed
When STOP Instruction Is Executed While CPU Is Operating on Main System Clock
CHAPTER 21 STANDBY FUNCTION
User’s Manual U17504EJ2V0UD
RL
RH
, f
RL
)
/2
7
, f
RL
/2
When CPU Is Operating on
9
is selected as the count clock
X1 Clock (f
X
)
External Main System Clock
When CPU Is Operating on
(f
EXCLK
)