UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 158

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

(3) 16-bit timer capture/compare register 010 (CR010)
Remarks 1. Setting ES001, ES000 = 1, 0 is prohibited.
156
Falling edge
Rising edge
Both rising and falling edges
CR010 is a 16-bit register that has the functions of both a capture register and a compare register. Whether it is
used as a capture register or a compare register is set by bit 2 (CRC002) of capture/compare control register 00
(CRC00).
CR010 can be set by a 16-bit memory manipulation instruction.
Reset signal generation sets this register to 0000H.
Cautions 1. If the CR010 register is cleared to 0000H, an interrupt request (INTTM010) is generated when
When CR010 is used as a compare register
The value set in the CR010 is constantly compared with 16-bit timer counter 00 (TM00) count value, and an
interrupt request (INTTM010) is generated if they match. The set value is held until CR010 is rewritten.
When CR010 is used as a capture register
It is possible to select the valid edge of the TI000 pin as the capture trigger. The TI000 pin valid edge is set by
prescaler mode register 00 (PRM00) (see Table 6-3).
CR010 Capture Trigger
2. ES001, ES000: Bits 5 and 4 of prescaler mode register 00 (PRM00)
Address: FF14H, FF15H
Symbol
CR010
CRC002:
2. When CR010 is used as a capture register, read data is undefined if the register read time
3. CR010 can be rewritten during TM00 operation. For details, see Caution 2 in Figure 6-20.
Table 6-3. CR010 Capture Trigger and Valid Edge of TI000 Pin (CRC002 = 1)
the value of CR010 changes from 0000H to 0001H following TM00 overflow (FFFFH). In
addition, INTTM010 is generated after a match between TM00 and CR010, after detecting the
valid edge of the TI000 pin, and the timer is cleared by a one-shot trigger.
and capture trigger input conflict (the capture data itself is the correct value).
If count stop input and capture trigger input conflict, the captured data is undefined.
Figure 6-5. Format of 16-Bit Timer Capture/Compare Register 010 (CR010)
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Bit 2 of capture/compare control register 00 (CRC00)
After reset: 0000H
FF15H
Falling edge
Rising edge
Both rising and falling edges
User’s Manual U17504EJ2V0UD
R/W
TI000 Pin Valid Edge
FF14H
ES001
0
0
1
ES000
0
1
1