UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 336

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UPD78F0386GK-8EU-A

Manufacturer Part Number
UPD78F0386GK-8EU-A
Description
MCU 96KB FLASH 5KB RAM
Manufacturer
Renesas Electronics America
Series
78K0/Lx2r
Datasheet

Specifications of UPD78F0386GK-8EU-A

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LCD, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
15.3 Registers Controlling Serial Interface CSI10
(1) Serial operation mode register 10 (CSIM10)
334
Address: FF80H After reset: 00H R/W
CSIM10
Serial interface CSI10 is controlled by the following four registers.
Notes 1.
Caution Be sure to clear bit 5 to 0.
Symbol
CSIM10 is used to select the operation mode and enable or disable operation.
CSIM10 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Serial operation mode register 10 (CSIM10)
Serial clock selection register 10 (CSIC10)
Port mode register 1 (PM1)
Port register 1 (P1)
2.
3.
4.
5.
6.
TRMD10
DIR10
Bit 0 is a read-only bit.
To use P10/SCK10/T
(00H).
Bit 0 (CSOT10) of CSIM10 and serial I/O shift register 10 (SIO10) are reset.
Do not rewrite TRMD10 when CSOT10 = 1 (during serial communication).
The SO10 output (see (a) in Figure 15-1) is fixed to the low level when TRMD10 is 0. Reception is
started when data is read from SIO10.
Do not rewrite DIR10 when CSOT10 = 1 (during serial communication).
CSOT10
CSIE10
CSIE10
0
<7>
Note 5
0
1
1
0
1
0
1
Note 6
Note 4
Figure 15-2. Format of Serial Operation Mode Register 10 (CSIM10)
Disables operation
Enables operation
Receive mode (transmission disabled).
Transmit/receive mode
MSB
LSB
Communication is stopped.
Communication is in progress.
TRMD10
6
Note 1
X
D0 and P12/SO10 as general-purpose ports, set CSIM10 in the default status
CHAPTER 15 SERIAL INTERFACE CSI10
Note 2
5
0
User’s Manual U17504EJ2V0UD
and asynchronously resets the internal circuit
Operation control in 3-wire serial I/O mode
DIR10
4
Transmit/receive mode control
Communication status flag
First bit specification
3
0
2
0
Note 3
.
1
0
CSOT10
0

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