UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 368

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

366
IICX0
CLX0
Bit 0
Caution Determine the transfer clock frequency of I
Remarks 1.
0
0
0
0
0
0
0
1
1
1
1
The selection clock is set using a combination of bits 3, 1, and 0 (SMC0, CL01, and CL00) of IIC clock selection
register 0 (IICCL0) and bit 0 (CLX0) of IIC function expansion register 0 (IICX0).
For example, the I
50 ns is calculated using following expression.
SMC0
Bit 3
0
0
0
0
1
1
1
0
1
1
1
f
SCL
2. f
enabling the operation (by setting bit 7 (IICE0) of IIC control register 0 (IICC0) to 1). To change
the transfer clock frequency, clear IICE0 once to 0.
IICCL0
CL01
= 1/(88
Bit 1
PRS
0
0
1
1
0
1
1
0
1
1
:
SCL0
:
SCL0
CL00
Bit 0
2
0
1
0
1
0
1
0
1
C transfer clock frequency (f
238.7 ns + 200 ns + 50 ns)
don’t care
Peripheral hardware clock frequency
inversion
f
f
f
Setting prohibited
f
f
Setting prohibited
f
f
Setting prohibited
PRS
PRS
PRS
PRS
PRS
PRS
PRS
t
R
/2
/2
/4
/2
/4
/2
/4
Selection Clock
CHAPTER 16 SERIAL INTERFACE IIC0
Table 16-2. Selection Clock Setting
(f
W
)
m/2
User’s Manual U17504EJ2V0UD
T
m
SCL0
f
f
f
f
f
f
f
SCL
W
W
W
W
W
W
W
T + t
48.1 kHz
Transfer Clock
/44
/86
/86
/24
/24
/12
/12
) when f
inversion
R
(f
W
+ t
/m)
2
F
C by using CLX0, SMC0, CL01, and CL00 before
t
F
W
= f
m/2
PRS
2.00 to 4.19 MHz
4.19 to 8.38 MHz
4.00 to 8.38 MHz
4.00 to 4.19 MHz
Settable Selection Clock
/2 = 4.19 MHz, m = 86, t
T
SCL0
(f
W
) Range
inversion
Normal mode
(SMC0 bit = 0)
High-speed mode
(SMC0 bit = 1)
High-speed mode
(SMC0 bit = 1)
R
Operation Mode
= 200 ns, and t
F
=