UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 957

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
A/D
converter
Function Details of Function
Noise
countermeasures
ANI0/P20 to
ANI7/P27
Input impedance
of ANI0 to ANI7
pins
AV
impedance
Interrupt request
flag (ADIF)
Conversion results
just after A/D
conversion start
A/D conversion
result register
(ADCR, ADCRH)
read operation
Internal equivalent
circuit
REF
pin input
To maintain the 10-bit resolution, attention must be paid to noise input to the AV
pin and pins ANI0 to ANI7.
• Connect a capacitor with a low equivalent resistance and a good frequency
• The higher the output impedance of the analog input source, the greater the
• Do not switch these pins with other pins during conversion.
• The accuracy is improved if the HALT mode is set immediately after the start of
The analog input pins (ANI0 to ANI7) are also used as input port pins (P20 to P27).
When A/D conversion is performed with any of ANI0 to ANI7 selected, do not access
P20 to P27 while conversion is in progress; otherwise the conversion resolution may
be degraded. It is recommended to select pins used as P20 to P27 starting with the
ANI0/P20 that is the furthest from AV
If a digital pulse is applied to the pins adjacent to the pins currently used for A/D
conversion, the expected value of the A/D conversion may not be obtained due to
coupling noise. Therefore, do not apply a pulse to the pins adjacent to the pin
undergoing A/D conversion.
This A/D converter charges a sampling capacitor for sampling during sampling time.
Therefore, only a leakage current flows when sampling is not in progress, and a
current that charges the capacitor flows during sampling. Consequently, the input
impedance fluctuates depending on whether sampling is in progress, and on the
other states.
To make sure that sampling is effective, however, it is recommended to keep the
output impedance of the analog input source to within 10 kΩ, and to connect a
capacitor of about 100 pF to the ANI0 to ANI7 pins (see Figure 13-20).
A series resistor string of several tens of kΩ is connected between the AV
AV
Therefore, if the output impedance of the reference voltage source is high, this will
result in a series connection to the series resistor string between the AV
pins, resulting in a large reference voltage error.
The interrupt request flag (ADIF) is not cleared even if the analog input channel
specification register (ADS) is changed. Therefore, if an analog input pin is changed
during A/D conversion, the A/D conversion result and ADIF for the pre-change
analog input may be set just before the ADS rewrite. Caution is therefore required
since, at this time, when ADIF is read immediately after the ADS rewrite, ADIF is set
despite the fact A/D conversion for the post-change analog input has not ended.
When A/D conversion is stopped and then resumed, clear ADIF before the A/D
conversion operation is resumed.
The first A/D conversion value immediately after A/D conversion starts may not fall
within the rating range if the ADCS bit is set to 1 within 1
set to 1, or if the ADCS bit is set to 1 with the ADCE bit = 0. Take measures such as
polling the A/D conversion end interrupt request (INTAD) and removing the first
conversion result.
When a write operation is performed to the A/D converter mode register (ADM),
analog input channel specification register (ADS), and A/D port configuration register
(ADPC), the contents of ADCR and ADCRH may become undefined. Read the
conversion result following conversion completion before writing to ADM, ADS, and
ADPC. Using a timing other than the above may cause an incorrect conversion
result to be read.
The equivalent circuit of the analog input block is shown below. (see Figure 13-22)
response to the power supply.
influence. To reduce the noise, connecting external C as shown in Figure 13-20 is
recommended.
conversion.
SS
pins.
REF
Cautions
.
APPENDIX D LIST OF CAUTIONS
μ
s after the ADCE bit was
REF
REF
and AV
and
REF
SS
p. 428
p. 429
p. 429
p. 429
p. 429
p. 430
p. 430
p. 430
p. 431
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