UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 65

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(1) Port functions (2/2): 78K0/KC2
Notes 1.
(2) Non-port functions (1/2): 78K0/KC2
Notes 1. 44-pin and 48-pin products only
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
P120
P121
P122
P123
P124
P130
P140
ANI0 to ANI5
ANI6
EXLVI
EXSCL0
FLMD0
INTP0
INTP1
INTP2
INTP3
INTP4
INTP5
INTP6
KR0, KR1
KR2
PCL
Function Name
Function Name
Note 1
Note 3
Note 1
Note 2
Note 2
Note 3
2. 48-pin products only
2.
3. 48-pin products only
, KR3
, ANI7
μ
and bits 2 and 3 of P7 to “0”.
μ
For the 38-pin products, be sure to set bits 6 and 7 of PM2 to “1”, and bits 2 and 3 of PM7, bits 6 and 7 of P2,
PD78F0513D, 78F0513DA, 78F0515D and 78F0515DA (product with on-chip debug function) only
PD78F0513D, 78F0513DA, 78F0515D and 78F0515DA (product with on-chip debug function) only
Note 1
Note 1
I/O
Output
I/O
Input
Input
Input
Input
Input
Output
I/O
I/O
−
Port 12.
5-bit I/O port.
Input/output can be specified in 1-bit units.
Only for P120, use of an on-chip pull-up resistor can be
specified by a software setting.
Port 13.
1-bit output-only port.
Port 14.
1-bit I/O port.
Input/output can be specified in 1-bit units.
Use of an on-chip pull-up resistor can be specified by a
software setting.
A/D converter analog input
Potential input for external low-voltage detection
External clock input for serial interface.
To input an external clock, input a clock of 6.4 MHz.
Flash memory programming mode setting
External interrupt request input for which the valid edge (rising
edge, falling edge, or both rising and falling edges) can be
specified
Key interrupt input
Clock output (for trimming of high-speed system clock,
subsystem clock)
Function
Function
CHAPTER 2 PIN FUNCTIONS
Input port
Output port
Input port
After Reset
Analog input
Input port
Input port
Input port
Input port
Input port
After Reset
−
INTP0/EXLVI
X1/OCD0A
X2/EXCLK/OCD0B
XT1
XT2/EXCLKS
PCL/INTP6
Alternate Function
Alternate Function
P20 to P25
P26
P120/INTP0
P62
P120/EXLVI
P30
P31/OCD1A
P32/OCD1B
P33/TI51/TO51
P16/TOH1
P140/PCL
P70, P71
P72
P140/INTP6
Note 1
Note 1
−
, P27
, P73
−
Note 1
Note 2
Note 3
Note 3
Note 2
Note 2
Note 1
Note 1
Note 1
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