UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 29

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UPD78F0500AMC-CAB-AX

Manufacturer Part Number
UPD78F0500AMC-CAB-AX
Description
MCU 8BIT 30SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500AMC-CAB-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Block blank check library
Block erase library
Word write library
Block verify library
Set information library
EEPROM write library
Block blank check library
Block erase library
Word write library
Block verify library
Set information library
EEPROM write library
78K0/Kx2
1.1.6 Interrupt response time for self programming library
(1) Conventional-specification products (
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Remarks 1. The above interrupt response times are those during stabilized operation of the internal high-speed
Note The longer value of the EEPROM write library interrupt response time becomes the Max. value, depending on
Remarks 1. f
<1> When internal high-speed oscillation clock is used
<2> When high-speed system clock is used (normal model of C compiler)
Library Name
Library Name
the value of f
2. RSTS: Bit 7 of the internal oscillation mode register (RCM)
2. RSTOP: Bit 0 of the internal oscillation mode register (RCM)
3. RSTS: Bit 7 of the internal oscillation mode register (RCM)
oscillator (RSTS = 1).
CPU
Note
: CPU operation clock frequency
CPU
.
Entry RAM location
Entry RAM location
direct addressing
direct addressing
333/f
is outside short
is outside short
179/f
179/f
179/f
29/f
333/f
80/f
1026.6
2505.8
2760.8
CPU
range
476.5
range
CPU
933.6
958.6
CPU
CPU
CPU
CPU
CPU
Normal Model of C Compiler
+ 1759
+ 370
+ 1589
RSTOP = 0, RSTS = 1
+ 507
+ 559
+ 518
+ 834
μ
PD78F05xx and 78F05xxD) (1/2)
Entry RAM location
Entry RAM location
addressing range
addressing range
is in short direct
is in short direct
333/f
179/f
179/f
179/f
29/f
333/f
80/f
Interrupt Response Time (
Interrupt Response Time (
1942.8
2168.8
CPU
211.5
CPU
668.6
763.6
693.6
CPU
CPU
CPU
CPU
CPU
+ 1468
+ 165
+ 1298
+ 407
+ 460
+ 418
+ 512
Entry RAM location
Entry RAM location
Static Model of C Compiler/Assembler
direct addressing
direct addressing
179/f
179/f
333/f
179/f
333/f
is outside short
is outside short
80/f
29/f
μ
μ
1020.9
2497.8
2759.5
CPU
CPU
s (Max.))
s (Max.))
475.5
range
927.9
952.9
range
CPU
CPU
CPU
CPU
CPU
+ 1513
+ 1759
+ 1650
+ 1702
+ 2732
+ 1661
+ 2061
RSTOP = 1
CHAPTER 1 OUTLINE
Entry RAM location
Entry RAM location
addressing range
addressing range
is in short direct
is in short direct
333/f
179/f
179/f
179/f
29/f
333/f
80/f
1934.8
2167.5
CPU
210.5
662.9
757.9
687.9
CPU
CPU
CPU
CPU
CPU
CPU
+ 1468
+ 472
+ 1605
+ 714
+ 767
+ 725
+ 873
29

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