UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 106

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Notes 1. When boot swap is not used: Set the option bytes to 0080H to 0084H.
Remark The flash memory is divided into blocks (one block = 1 KB). For the address values and block numbers, see
Common
area
Bank
area
Data memory
space
Figure 3-9. Memory Map (
2. Writing boot cluster 0 can be prohibited depending on the setting of security (see 27.8 Security Settings).
3. The buffer RAM is incorporated only in the
Program
memory
space
Program RAM area
RAM space in
which instruction
can be fetched
Table 3-3 Correspondence Between Address Values and Block Numbers in Flash Memory.
1 KB
When boot swap is used:
to FA1FH cannot be used with the
B B F F H
B F F F H
B C 0 0 H
7 B F F H
8 4 F F H
8 3 F F H
7 F F F H
7 C 0 0 H
0 7 F F H
0 3 F F H
8 0 0 0 H
0 4 0 0 H
0 0 0 0 H
Common
area
Bank
area
F E D F H
B F F F H
F F F F H
F E F F H
F E E 0 H
F A F F H
F A 1 F H
E 7 F F H
C 0 0 0 H
F F 0 0 H
F B 0 0 H
F A 2 0 H
F A 0 0 H
F 9 F F H
F 7 F F H
E 8 0 0 H
7 F F F H
F 8 0 0 H
8 0 0 0 H
0 0 0 0 H
Block 2FH
Block 20H
Block 1FH
Block 01H
Block 00H
Special function registers
Internal high-speed RAM
Internal expansion RAM
(Memory bank 0)
General-purpose
(memory bank 0)
32
32
Flash memory
32768
registers
Flash memory
16384
1024
4096
256
Buffer RAM
Reserved
Reserved
Reserved
8 bits
8 bits
μ
(SFR)
PD78F0526, 78F0526A, 78F0536, 78F0536A, 78F0546, and 78F0546A)
8 bits
8 bits
8 bits
8 bits
8 bits
Note 3
Set the option bytes to 0080H to 0084H and 1080H to 1084H.
μ
PD78F0526, 78F0526A, 78F0536, and 78F0536A.
(Memory bank 2)
Block 3FH
Block 30H
(Memory bank 1)
(Memory bank 1)
(Memory bank 3)
μ
PD78F0546 and 78F0546A (78K0/KF2). The area from FA00H
7 F F F H
0 F F F H
1 0 8 5 H
1 0 8 4 H
1 0 8 0 H
1 0 7 F H
0 7 F F H
1 0 0 0 H
0 8 0 0 H
0 0 8 5 H
0 0 8 4 H
0 0 8 0 H
0 0 7 F H
0 0 4 0 H
0 0 3 F H
0 0 0 0 H
Block 4FH
Block 40H
Option byte area
Option byte area
(Memory bank 2)
CHAPTER 3 CPU ARCHITECTURE
CALLF entry area
CALLT table area
Vector table area
Program area
Program area
Program area
2048
1915
64
64
5
5
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
Note 1
Note 1
1 F F F H
Boot cluster 0
Block 5FH
Block 50H
Boot cluster 1
(Memory bank 3)
Note 2
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