UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 234

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(3) Setting of operation mode for subsystem clock pin
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Notes 1.
Caution
Remark
The operation mode for the subsystem clock pin
control register (PCC) and bits 5 and 4 (EXCLKS, OSCSELS) of the clock operation mode select register (OSCCTL)
in combination.
Note
f
f
f
f
f
f
XP
XP
XP
XP
XP
SUB
XTSTART
CPU Clock (f
/2
/2
/2
/2
/2
PCC
Bit 6
2
3
4
2.
The 78K0/KB2 is not provided with a subsystem clock.
Note 2
0
0
0
0
1
Table 6-2. Relationship Between CPU Clock and Minimum Instruction Execution Time
The main clock mode register (MCM) is used to set the main system clock supplied to CPU clock (high-
speed system clock/internal high-speed oscillation clock) (see Figure 6-9).
The 78K0/KB2 is not provided with a subsystem clock.
Confirm that bit 5 (CLS) of the processor clock control register (PCC) is 0 (CPU is operating with
main system clock) when changing the current values of XTSTART, EXCLKS, and OSCSELS.
×: don’t care
EXCLKS
CPU
Bit 5
)
0
0
1
1
×
OSCCTL
Table 6-3. Setting of Operation Mode for Subsystem Clock Pin
High-Speed System Clock
0.2
0.4
0.8
1.6
3.2
At 10 MHz
Operation
μ
μ
μ
μ
μ
OSCSELS
s
s
s
s
s
Bit 4
0
1
0
1
×
(78K0/KC2, 78K0/KD2, 78K0/KE2, 78K0/KF2)
−
0.1
0.2
0.4
0.8
1.6
I/O port mode
XT1 oscillation mode
I/O port mode
External clock input mode
XT1 oscillation mode
At 20 MHz
Operation
μ
μ
μ
μ
μ
Subsystem Clock Pin
s
s
s
s
s
Main System Clock
Operation Mode
Note 1
Minimum Instruction Execution Time: 2/f
Note
0.25
0.5
1.0
2.0
4.0
can be set by using bit 6 (XTSTART) of the processor clock
At 8 MHz (TYP.) Operation
μ
μ
μ
μ
μ
s (TYP.)
s (TYP.)
s (TYP.)
s (TYP.)
Internal High-Speed
Oscillation Clock
s (TYP.)
I/O port
Crystal resonator connection
I/O port
I/O port
Crystal resonator connection
−
P123/XT1 Pin
Note 1
CHAPTER 6 CLOCK GENERATOR
122.1
CPU
At 32.768 kHz Operation
Subsystem Clock
μ
External clock input
s
P124/XT2/EXCLKS
−
−
−
−
−
Pin
Note 2
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