UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 371

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(2) 8-bit timer H carrier control register 1 (TMCYC1)
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Notes 2.
Cautions 1. When TMHE1 = 1, setting the other bits of TMHMD1 is prohibited. However, TMHMD1 can be
Remarks 1. f
This register controls the remote control output and carrier pulse output status of 8-bit timer H1.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Note Bit 0 is read-only.
Caution Do not rewrite RMC1 when TMHE = 1. However, TMCYC1 can be refreshed (the same value is
3.
2. f
2. In the PWM output mode and carrier generator mode, be sure to set the 8-bit timer H compare
3. When the carrier generator mode is used, set so that the count clock frequency of TMH1
4. The actual TOH1/INTP5/P16 pin output is determined depending on PM16 and P16, besides TOH1
If the peripheral hardware clock (f
when 1.8 V ≤ V
This is settable only if 4.0 V ≤ V
written).
Address: FF6DH
PRS
RL
refreshed (the same value is written).
register 11 (CMP11) when starting the timer count operation (TMHE1 = 1) after the timer count
operation was stopped (TMHE1 = 0) (be sure to set again even if setting the same value to
CMP11).
becomes more than 6 times the count clock frequency of TM51.
output.
TMCYC1
:
: Peripheral hardware clock frequency
Internal low-speed oscillation clock frequency
Figure 9-7. Format of 8-Bit Timer H Carrier Control Register 1 (TMCYC1)
DD
RMC1
NRZ1
0
0
1
1
0
1
0
< 2.7 V, the setting of CKS12 = CKS11 = CKS10 = 0 (count clock: f
After reset: 00H
Carrier output disabled status (low-level status)
Carrier output enabled status
(RMC1 = 1: Carrier pulse output, RMC1 = 0: High-level status)
NRZB1
0
0
1
0
1
DD
PRS
≤ 5.5 V.
Low-level output
High-level output at rising edge of INTTM51 signal input
Low-level output
Carrier pulse output at rising edge of INTTM51 signal input
) operates on the internal high-speed oscillation clock (f
0
R/W
Carrier pulse output status flag
Note
0
Remote control output
0
CHAPTER 9 8-BIT TIMERS H0 AND H1
RMC1
NRZB1
NRZ1
<0>
PRS
) is prohibited.
RH
) (XSEL = 0),
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