UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 626

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UPD78F0500AMC-CAB-AX

Manufacturer Part Number
UPD78F0500AMC-CAB-AX
Description
MCU 8BIT 30SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500AMC-CAB-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2
19.4 Operations of Multiplier/Divider
19.4.1 Multiplication operation
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
• Initial setting
• During operation
• End of operation
• Next operation
1. Set operation data to multiplication/division data register A0L (MDA0L) and multiplication/division data register B0
2. Set bits 0 (DMUSEL0) and 7 (DMUE) of multiplier/divider control register 0 (DMUC0) to 1. Operation will start.
3. The operation will be completed when 16 peripheral hardware clocks (f
4. The operation result data is stored in the MDA0L and MDA0H registers.
5. DMUE is cleared to 0 (end of operation).
6. After the operation, an interrupt request signal (INTDMU) is generated.
7. To execute multiplication next, start from the initial setting in 19.4.1 Multiplication operation.
8. To execute division next, start from the initial setting in 19.4.2 Division operation.
(MDB0).
operation (intermediate data is stored in the MDA0L and MDA0H registers during operation, and therefore the read
values of these registers are not guaranteed).
CHAPTER 19 MULTIPLIER/DIVIDER
PRS
) have been issued after the start of the
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