UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 522

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Address: FF95H
(6) Automatic data transfer interval specification register 0 (ADTI0)
Caution Because the setting of bit 5 (STBE0) and bit 4 (BUSYE0) of serial status register 0 (CSIS0) takes
Symbol
ADTI0
This is an 8-bit register used to specify the interval time for byte data transfer during automatic data transfer (bit 6
(ATE0) of serial operation mode specification register 0 (CSIMA0) = 1).
Set this register when in master mode (bit 4 (MASTER0) of CSIMA0 = 1) (setting is unnecessary in slave mode).
Setting in 1-byte communication mode (bit 6 (ATE0) of CSIMA0 = 0) is also valid. When the interval time
specified by ADTI0 after the end of 1-byte communication has elapsed, an interrupt request signal (INTACSI) is
output. The number of clocks for the interval can be set to between 0 and 63 clocks.
This register can be set by an 8-bit memory manipulation instruction. However, when bit 0 (TSF0) of serial status
register 0 (CSIS0) is 1, rewriting ADTI0 is prohibited.
The specified interval time is the serial clock (specified by divisor selection register 0 (BRGCA0)) multiplied by an
integer value.
Example When ADTI0 = 03H
Figure 17-7. Format of Automatic Data Transfer Interval Specification Register 0 (ADTI0)
priority over the ADTI0 setting, the interval time based on the setting of STBE0 and BUSYE0 is
generated even when ADTI0 is cleared to 00H.
Example Interval time when ADTI0 = 00H and busy signal is not generated
Therefore, clearing STBE0 and BUSYE0 to 0 is required to perform no-wait transfer.
After reset: 00H
7
0
<1> When STBE0 = 1, BUSYE0 = 0: Interval time of two serial clocks is generated
<2> When STBE0 = 0, BUSYE0 = 1: Interval time of one serial clock is generated
<3> When STBE0 = 1, BUSYE0 = 1: Interval time of two serial clocks is generated
SCKA0
6
0
R/W
ADTI05
5
Interval time of 3 clocks
ADTI04
4
ADTI03
CHAPTER 17 SERIAL INTERFACE CSIA0
3
ADTI02
2
ADTI01
1
ADTI00
0
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