UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 339

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(2) Setting LVS0n and LVR0n
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Set LVS0n and LVR0n using the following procedure.
Caution Be sure to set LVS0n and LVR0n following steps <1>, <2>, and <3> above.
<1> The TO0n output goes high when LVS0n and LVR0n = 10.
<2> The TO0n output goes low when LVS0n and LVR0n = 01 (the pin output remains unchanged from the high level
<3> The timer starts operating when TMC0n3 and TMC0n2 are set to 01, 10, or 11. Because LVS0n and LVR0n
<4> The TO0n output level is inverted each time an interrupt signal (INTTM00n) is generated.
Remark n = 0:
even if LVS0n and LVR0n are cleared to 00).
were set to 10 before the operation was started, the TO0n output starts from the high level. After the timer
starts operating, setting LVS0n and LVR0n is prohibited until TMC0n3 and TMC0n2 = 00 (disabling the timer
operation).
Step <2> can be performed after <1> and before <3>.
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
Setting
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
78K0/KD2 products
Setting
Figure 7-58. Example of Flow for Setting LVS0n and LVR0n Bits
Setting
TOC0n.OSPE0n, TOC0n4, TOC0n1
(TMC0n3, TMC0n2)
Setting
TOC0n.LVR0n bit
TOC0n.LVS0n bit
TMC0n.TMC0n3, TMC0n2
INTTM00n signal
TOC0n.LVS0n, LVR0n
Figure 7-59. Timing Example of LVR0n and LVS0n
Operable bits
TO0n output
TOC0n.TOE0n
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
bit
00
bits
bits
<1>
bits
<2> <1> <3> <4>
<1> Setting of timer output operation
<2> Setting of timer output F/F
<3> Enabling timer operation
01, 10, or 11
<4>
<4>
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