UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 333

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(3) Measuring the pulse width by using one input signal of the TI00n pin (clear & start mode entered by the TI00n
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
pin valid edge input)
Set the clear & start mode entered by the TI00n pin valid edge (TMC0n3 and TMC0n2 = 10). The count value of
TM0n is captured to CR00n in the phase reverse to the valid edge of the TI00n pin, and the count value of TM0n is
captured to CR01n and TM0n is cleared (0000H) when the valid edge of the TI00n pin is detected. Therefore, a cycle
is stored in CR01n if TM0n does not overflow.
If an overflow occurs, take the value that results from adding 10000H to the value stored in CR01n as a cycle. Clear
bit 0 (OVF0n) of 16-bit timer mode control register 0n (TMC0n) to 0.
<1> Pulse cycle =
<2> High-level pulse width = (10000H × Number of times OVF0n bit is set to 1 + Captured value of CR00n) × Count
<3> Low-level pulse width = (Pulse cycle − High-level pulse width)
Remark n = 0:
Capture & count clear input
Capture trigger input
(TMC0n3, TMC0n2)
Capture interrupt
Capture interrupt
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
Capture register
Capture register
TM0n register
Operable bits
Overflow flag
(INTTM01n)
(INTTM00n)
(CR00n)
(CR01n)
(OVF0n)
(TI00n)
(TI01n)
FFFFH
0000H
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
78K0/KD2 products
Figure 7-55. Timing Example of Pulse Width Measurement (3)
00
L
L
(10000H × Number of times OVF0n bit is set to 1 + Captured value of CR01n) × Count
clock cycle
clock cycle
0000H
0000H
• TMC0n = 08H, PRM0n = 10H, CRC0n = 07H
10
M
<2>
A
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
M
<1>
<3>
N
A
<2>
<1>
N
B
<3>
S
0 write clear
B
<2>
<1>
S
C
<3>
P
C
<2>
<1>
P
D
<3>
Q
D
Q
00
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